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ST7SCR Datenblatt(PDF) 38 Page - STMicroelectronics |
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ST7SCR Datenblatt(HTML) 38 Page - STMicroelectronics |
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38 / 101 page ![]() ST7SCR 38/101 10 MISCELLANEOUS REGISTERS MISCELLANEOUS REGISTER 1 (MISCR1) Reset Value : 0000 0000 (00h) Read/Write Writing the ITIFREC register enables or disables external interrupt on Port C. Each bit can be masked independantly. The ITMx bit masks the external interrupt on PC.x. Bits[7:0] = ITM [7:0] Interrupt Mask 0: external interrupt disabled 1: external interrupt enabled MISCELLANEOUS REGISTER 2 (MISCR2) Reset Value : 0000 0000 (00h) Read/Write Writing the ITIFREA register enables or disables external interrupt on port A. Bit 7 = Reserved. Bit 6 = CRDIRM CRD Insertion/Removal Interrupt Mask 0: CRDIR interrupt disabled 1: CRDIR interrupt enabled Bits [5:0] = ITM [14:9] Interrupt Mask Bit x of MISCR2 masks the external interrupt on port A.x. Bit x = ITM n Interrupt Mask n 0: external interrupt disabled on PA.x. 1: external interrupt enabled on PA.x. 70 ITM 7 ITM 6 ITM 5 ITM 4 ITM 3 ITM 2 ITM 1 ITM 0 70 - CRD IRM ITM 14 ITM 13 ITM 12 ITM 11 ITM 10 ITM 9 |
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