ST7SCR_07 datasheet(44/101 Pages) STMICROELECTRONICS

44 / 101 page

ST7SCR

44/101

12.2 TIME BASE UNIT (TBU)

12.2.1 Introduction

The Timebase unit (TBU) can be used to generate

periodic interrupts.

12.2.2 Main Features

■ 8-bit upcounter

■ Programmable prescaler

■ Period between interrupts: max. 8.1ms (at 8

MHz fCPU )

■ Maskable interrupt

12.2.3 Functional Description

The TBU operates as a free-running upcounter.

When the TCEN bit in the TBUCSR register is set

by software, counting starts at the current value of

the TBUCV register. The TBUCV register is incre-

mented at the clock rate output from the prescaler

selected by programming the PR[2:0] bits in the

TBUCSR register.

When the counter rolls over from FFh to 00h, the

OVF bit is set and an interrupt request is generat-

ed if ITE is set.

The user can write a value at any time in the

TBUCV register.

12.2.4 Programming Example

In this example, timer is required to generate an in-

terrupt after a delay of 1 ms.

Assuming that fCPU is 8 MHz and a prescaler divi-

sion factor of 256 will be programmed using the

PR[2:0] bits in the TBUCSR register, 1 ms = 32

TBU timer ticks.

In this case, the initial value to be loaded in the

TBUCV must be (256-32) = 224 (E0h).

ld A, E0h

ld TBUCV, A

; Initialize counter value

ld A 1Fh

;

ld TBUCSR, A

; Prescaler factor = 256,

; interrupt enable,

; TBU enable

Figure 28. TBU Block Diagram

TBU 8-BIT UPCOUNTER (TBUCV REGISTER)

INTERRUPT REQUEST

TBU PRESCALER

fCPU

TBUCSR REGISTER

PR1 PR0

PR2

TCEN

ITE

OVF

MSB

LSB

TBU

ST7SCR Datenblatt(PDF) 44 Page - STMicroelectronics

ST7SCR Datenblatt(HTML) 44 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datenblatt Download

Link URL