CMV2000 datasheet(26/87 Pages) AMSOSRAM

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CMV2000

Functional description

Datasheet

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• v8-00 • 2025-Jul-07

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7.2.2

Biasing

For optimal performance, some pins need to be decoupled to ground or to VDD. Please refer

to the pin list for a detailed description for every pin and the appropriate decoupling if

applicable.

7.2.3

Digital input pins

Table 5 gives an overview of the external pins used to drive the sensor. The digital signals are

sampled on the rising edge of the CLK_IN, therefore the length of the signal applied to an input

should be at least 1 CLK_IN period to assure it has been detected. All digital I/O’s have a

capacitance of 2 pF max.

Table 5: Digital input pins description

Pin name

Description

CLK_IN

Master input clock, frequency range between 5 and 48 MHz.

LVDS_CLK_N/P

High speed LVDS input clock, frequency range between 50 and 480 MHz.

SYS_RES_N

System reset pin, active low signal. Resets the on-board sequencer and must be kept low

during start-up. This signal should be at least one period of CLK_IN long to assure detection

on the rising edge of CLK_IN.

FRAME_REQ

Frame request pin. When a high level is detected on this pin the programmed number of

frames is captured and sent by the sensor. This signal should be at least one period of

CLK_IN long to assure detection on the rising edge of CLK_IN.

SPI_IN

Data input pin for the SPI interface. The data to program the image sensor is sent over this

pin.

SPI_EN

SPI enable pin. When this pin is high the data should be written/read on the SPI.

SPI_CLK

SPI clock. This is the clock on which the SPI runs.

T_EXP1

Input pin to program the exposure time externally. Optional

T_EXP2

Input pin to program the exposure time externally in HDR mode. Optional

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