CMV2000 datasheet(66/87 Pages) AMSOSRAM

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CMV2000

Functional description

Datasheet

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7.6.1.2

Gain

An analog gain and ADC gain can be applied to the output signal. The analog gain is applied

by a PGA in every column. The digital gain is applied by the ADC.

Information:

Depending on the sensor version, there is a slight difference in the register settings. Therefore,

depending on the sensor version the user should follow Table 29 for version 2 and Table 30

for version 3.

Table 29: Gain settings for version 2

Default value

Description of the value

PGA_gain

102[1:0]

0: x1 gain

1: x1.2 gain

2: x1.4 gain

3: x1.6 gain

ADC_gain

103[7:0]

Defines the slope of the ADC ramp, a higher value

equals more gain.

Table 30: Gain settings for version 3

Default value

Description of the value

PGA_gain

102[1:0]

121[0]

102[1:0]

0: x1 gain

1: x1.2 gain

2: x1.4 gain

3: x1.6 gain

121[0]

0: Gain is defined in 102[1:0]

1: Gain in 102[1:0] is amplified by 2

ADC_gain

103[7:0]

Defines the slope of the ADC ramp, a higher value

equals more gain.

The ADC gain is dependent on the master clock. A slower clock signal means a higher

ADC_gain register value for an actual ADC gain of 1x. Also at higher register values, the actual

ADC gain will increase in bigger steps. So, fine-tuning the ADC gain is easier at lower register

values.

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