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CC1404P Datenblatt(PDF) 10 Page - Texas Instruments

Teilenummer CC1404P
Bauteilbeschribung  CC1404P SimpleLink™ High-Performance Sub-1GHz O-QPSK and FSK Transciever
PDF  44 Pages
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Hersteller  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

CC1404P Datenblatt(HTML) 10 Page - Texas Instruments

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Measured on a Texas Instruments reference design with Tc = 25°C, unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VIH
Lowest GPIO input voltage reliably
interpreted as a High
0.8*VDDS
V
VIL
Highest GPIO input voltage reliably
interpreted as a Low
0.2*VDDS
V
6.11 SPI Characteristics
Over operating free-air temperature range (unless otherwise noted)
PARAMETERS
TEST CONDITIONS
MIN
TYP
MAX
UNIT
fSCLK
1/tsclk
SPI clock frequency
Secondary Mode 2.97V < VDDS < 3.8V
12
MHz
Secondary Mode VDDS < 2.97V
8
DCSCK
SCK duty cycle
45%
50%
55%
6.12 DC/DC
When Measured on the BP-CC1404P-8-FE reference design with Tc = 25°C, VDDS = 3.6V.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Inductor at VDDR pin
2.2
µH
Load capacitor at VDDR pin
10
µF
6.13 48MHz Crystal Oscillator (HFXT)
Measured on a Texas Instruments reference design with Tc = 25°C, VDDS = 3.6V, unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Crystal frequency
Recommended BOM and
layout
48
MHz
ESR
Equivalent series resistance 6 pF < CL ≤ 9 pF
20
60
Ω
ESR
Equivalent series resistance 5 pF < CL ≤ 6 pF
80
Ω
CL
Crystal load capacitance(3)
5
7(2)
9
pF
Start-up
time(1)
Until clock is qualified, 48MHz crystals only
200
µs
(1)
Start-up time using the TI-provided power driver. Start-up time may increase if driver is not used.
(2)
On-chip default connected capacitance including reference design parasitic capacitance.
(3)
Adjustable load capacitance is integrated into the device. External load capacitors are required for systems targeting compliance with
certain regulations.
6.14 48MHz Clock Output Buffer
Measured on a Texas Instruments reference design with Tc = 25°C, VDDS = 3.6V, unless otherwise noted.(1)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Clock frequency
48
MHz
Startup time
Recommended BOM and layout
500
µs
Load capacitance
PCB + parasitics on receiving input pin
2
5
10
pF
Clipped sine output, average voltage
CL=10pF (trimmed)
0.65
V
Clipped sine output, peak-to-peak
0.6
1.24
V
Current consumption when active
2
mA
(1)
Probing or otherwise stopping the TCXO while the DC/DC converter is enabled may cause permanent damage to the device.
CC1404P
SWRS300 – SEPTEMBER 2026
www.ti.com
10
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Copyright © 2026 Texas Instruments Incorporated
Product Folder Links: CC1404P



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