910GL datasheet(62/426 Pages) INTEL

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Datasheet

3.3.5

Intel

® 915x GMCH Configuration Cycle Flowchart

Figure 3-6. Intel

® 915x GMCH Configuration Cycle Flowchart

DW I/O W rite to

CONFIG_ADDRES

S with bit 31 = 1

I/O Read/W rite to

CONFIG_DATA

GMCH Generates

Type 1 Access to

PCI Express

MCH allows cycle to

go to DMI resulting in

Master Abort

Bus# > Sec Bus

Bus#

≤ Sub Bus

in GMCH Dev 1

Bus# = 0

Device# = 1 &

Dev # 1 Enabled

Device# = 0

Device# = 2 &

Dev# 2

Enabled

GMCH Generates MISI

Type 1Configuration

Cycle

Bus# =

Secondary Bus in

GMCH Dev 1

GMCH Generates DMI

Type 0 Configuration

Cycle

Device# = 7&

Dev# 7 Enabled

GMCH Claims if

Function# = 0

GMCH Claims if

Function# = 0

GMCH Claims if

Function# = 0

GMCH Claims if

Function# = 0

Yes

Device# = 0

GMCH Generates

Type 0 Accessto

PCI Express

Yes

Config_Cyc_Flow_915

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