RL78 datasheet(44/100 Pages) RENESAS

44 / 100 page

RL78/G14

2. ELECTRICAL SPECIFICATIONS

R01DS0053EJ0100 Rev. 1.00

Page 44 of 97

Feb 21, 2012

Caution

The pins mounted depend on the product. Refer to 1.3.1 30-pin products to 1.3.10 100-pin products.

2.2

Oscillator Characteristics

2.2.1

Main system clock oscillator characteristics

Note

Indicates only oscillator characteristics. Refer to AC Characteristics for instruction execution time.

Caution 1. When using the X1 oscillator, wire as follows in the area enclosed by the broken lines in the above figures to

avoid an adverse effect from wiring capacitance.

• Keep the wiring length as short as possible.

• Do not cross the wiring with the other signal lines.

• Do not route the wiring near a signal line through which a high fluctuating current flows.

• Always make the ground point of the oscillator capacitor the same potential as VSS.

• Do not ground the capacitor to a ground pattern through which a high current flows.

• Do not fetch signals from the oscillator.

Caution 2. Since the CPU is started by the high-speed on-chip oscillator clock after a reset release, check the X1 clock

oscillation stabilization time using the oscillation stabilization time counter status register (OSTC) by the user.

Determine the oscillation stabilization time of the OSTC register and the oscillation stabilization time select

(TA = -40 to +85 °C, 1.6 V

 EVDD0 = EVDD1  VDD  5.5 V, VSS = EVSS0 = EVSS1 = 0 V)

Resonator

Recommended Circuit

Parameter

Conditions

MIN.

TYP.

MAX.

Unit

Ceramic

resonator

X1 clock oscillation frequency

(fX) Note

2.7 V



VDD 5.5 V

1.0

20.0

MHz

1.8 V



VDD < 2.7 V

1.0

8.0

1.6 V



VDD < 1.8 V

1.0

4.0

Crystal resonator

X1 clock oscillation frequency

(fX) Note

2.7 V



VDD 5.5 V

1.0

20.0

MHz

1.8 V



VDD < 2.7 V

1.0

8.0

1.6 V



VDD < 1.8 V

1.0

4.0

VSS

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