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PC87413 Datenblatt(PDF) 54 Page - National Semiconductor (TI) |
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PC87413 Datenblatt(HTML) 54 Page - National Semiconductor (TI) |
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54 / 257 page ![]() 3.0 Device Architecture and Configuration (Continued) www.national.com 54 Revision1.2 3.7.7 ServerI/O Configuration 6 Register (SIOCF6) This register provides a fast way to disable one or more modules, without having to access the Activate register of each (see Section 3.3.1 on page 43). Power Well:VSB Location:Index 26h Type: Varies per bit Bit 76 5 43210 Name LOCKFDS General-Purpose Scratch Reserved SER1DIS SER2DIS PARPDIS FDCDIS Reset 0 0 0 00000 Bit Type Description 7 R/W1S LOCKFDS (Lock Fast Disable Configuration). When set to 1, this bit locks itself, the SER1DIS, SER2DIS, PARPDIS and FDCDIS bits in this register and the GLOBEN bit in the SIOCF1 register by disabling writing to all these bits. Once set, this bit can be cleared either by VDD Power-Up reset (or Hardware reset) or by VSB Power-Up reset, according to the VSBLOCK bit in the ACBLKCTL register (see Section 6.3.4 on page 128). In addition, this bit is cleared by setting the UNLOCKF bit in the ACBLKCTL register (PC87413 and PC87417). 0: R/W bits are enabled for write (default) 1: All bits are RO 6-5 R/W General-Purpose Scratch. 4- Reserved. 3 R/W or RO SER1DIS (Serial Port 1 Disable). When set to 1, this bit forces the Serial Port 1 module to be disabled (and its resources released) regardless of the actual setting of its Activation bit (index 30). 0: Enabled or Disabled, according to Activation bit (default) 1: Disabled 2 R/W or RO SER2DIS (Serial Port 2 Disable). When set to 1, this bit forces the Serial Port 2 module to be disabled (and its resources released) regardless of the actual setting of its Activation bit (index 30). 0: Enabled or Disabled, according to Activation bit (default) 1: Disabled 1 R/W or RO PARPDIS (Parallel Port Disable). When set to 1, this bit forces the Parallel Port module to be disabled (and its resources released) regardless of the actual setting of its Activation bit (index 30). 0: Enabled or Disabled, according to Activation bit (default) 1: Disabled 0 R/W or RO FDCDIS (Floppy Disk Controller Disable). When set to 1, this bit forces the Floppy Disk Controller module to be disabled (and its resources released) regardless of the actual setting of its Activation bit (index 30). 0: Enabled or Disabled, according to Activation bit (default) 1: Disabled |
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