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PC87413 Datenblatt(PDF) 78 Page - National Semiconductor (TI) |
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PC87413 Datenblatt(HTML) 78 Page - National Semiconductor (TI) |
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78 / 257 page ![]() 3.0 Device Architecture and Configuration (Continued) www.national.com 78 Revision1.2 3.15.4 X-Bus I/O Configuration Register (XIOCNF) This register is reset by hardware to 00h. Power Well:VSB Location:Index F0h Type: Varies per bit Bit 76543210 Name LOCKIOMP Reserved TSTADEN UDIOZEN3 UDIOZEN2 UDIOZEN1 UDIOZEN0 Reset 00000000 Figure 9. Memory Block Mapping Host Memory Space 0000 0000h FFFF FFFFh Memory Base Address (High, Low) Memory Zone Size BIOS Size BIOS Size User-Defined Memory Zone 0 (MEM 0) BIOS Zone 1 (BIOS 1) BIOS Zone 0 (BIOS 0) Legacy BIOS Address space Memory Zone Size User-Defined Memory Zone 1 (MEM 1) Figure 10. FWH Memory Mapping FWH Space 0000 0000h FFFF FFFFh BIOS Size BIOS Size BIOS Zone 1 (BIOS 1) BIOS Zone 0 (BIOS 0) FWH ID Match |
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