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WM8912 Datenblatt(PDF) 84 Page - Cirrus Logic

Teilenummer WM8912
Bauteilbeschribung  Ultra Low Power DAC with Headphone Driver
PDF  129 Pages
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Hersteller  CIRRUS [Cirrus Logic]
Direct Link  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

WM8912 Datenblatt(HTML) 84 Page - Cirrus Logic

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WM8912
Production Data
w
PD, Rev 4.1, February 2013
84
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
8
WSEQ_START
0
Writing a 1 to this bit starts the write
sequencer at the memory location
indicated by the
WSEQ_START_INDEX field. The
sequence continues until it reaches
an “End of sequence” flag. At the
end of the sequence, this bit will be
reset by the Write Sequencer.
5:0
WSEQ_START_
INDEX [5:0]
00_0000
Sequence Start Index. This is the
memory location of the first
command in the selected sequence.
0 to 31 = RAM addresses
32 to 48 = ROM addresses
49 to 63 = Reserved
R112 (70h)
Write
Sequencer 4
9:4
WSEQ_CURRE
NT_INDEX [5:0]
00_0000
Sequence Current Index (read only):
This is the location of the most
recently accessed command in the
write sequencer memory.
0
WSEQ_BUSY
0
Sequencer Busy flag (read only):
0 = Sequencer idle
1 = Sequencer busy
Note: it is not possible to write to
control registers via the control
interface while the Sequencer is
Busy.
Table 56 Write Sequencer Control - Initiating a Sequence
PROGRAMMING A SEQUENCE
A sequence consists of write operations to data bits (or groups of bits) within the control registers.
The register fields associated with programming the Control Write Sequencer are described in Table
57.
For each step of the sequence being programmed, the Sequencer Index must be written to the
WSEQ_WRITE_INDEX field. The values 0 to 31 correspond to all the available RAM addresses
within the Write Sequencer memory. (Note that memory addresses 32 to 48 also exist, but these are
ROM addresses, which are not programmable.)
Having set the Index as described above, Register R109 must be written to (containing the Control
Register Address, the Start Bit Position and the Field Width applicable to this step of the sequence).
Also, Register R110 must be written to (containing the Register Data, the End of Sequence flag and
the Delay time required after this step is executed). After writing to these two registers, the next step
in the sequence may be programmed by updating WSEQ_WRITE_INDEX and repeating the
procedure.
WSEQ_ADDR is an 8-bit field containing the Control Register Address in which the data should be
written.
WSEQ_DATA_START is a 4-bit field which identifies the LSB position within the selected Control
Register to which the data should be written. Setting WSEQ_DATA_START = 0100 will cause 1-bit
data to be written to bit 4. With this setting, 4-bit data would be written to bits 7:4 and so on.
WSEQ_DATA_WIDTH is a 3-bit field which identifies the width of the data block to be written. This
enables selected portions of a Control Register to be updated without any concern for other bits within
the same register, eliminating the need for read-modify-write procedures. Values of 0 to 7 correspond
to data widths of 1 to 8 respectively. For example, setting WSEQ_DATA_WIDTH = 010 will cause a
3-bit data block to be written. Note that the maximum value of this field corresponds to an 8-bit data
block; writing to register fields greater than 8 bits wide must be performed using two separate
operations of the Control Write Sequencer.



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