WM8912 datasheet(41/129 Pages) CIRRUS

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Production Data

WM8912

PD, Rev 4.1, February 2013

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

LINEOUTL_ENA

Enables LINEOUTL input stage

0 = Disabled

1 = Enabled

For normal operation, this bit should

be set as the first step of the

LINEOUTL Enable sequence.

LINEOUTR_RMV

_SHORT

Removes LINEOUTR short

0 = LINEOUTR short enabled

1 = LINEOUTR short removed

For normal operation, this bit should

be set as the final step of the

LINEOUTR Enable sequence.

LINEOUTR_ENA_

OUTP

Enables LINEOUTR output stage

0 = Disabled

1 = Enabled

For normal operation, this bit should

be set to 1 after the DC offset

cancellation has been scheduled.

LINEOUTR_ENA_

DLY

Enables LINEOUTR intermediate

stage

0 = Disabled

1 = Enabled

For normal operation, this bit should

be set to 1 after the output signal path

has been configured, and before DC

offset cancellation is scheduled. This

bit should be set with at least 20us

delay after LINEOUTR_ENA.

LINEOUTR_ENA

Enables LINEOUTR input stage

0 = Disabled

1 = Enabled

For normal operation, this bit should

be set as the first step of the

LINEOUTR Enable sequence.

Table 26 Headphone / Line Output Pop Suppression Control

OUTPUT VOLUME CONTROL

Each analogue output can be independently controlled using the registers described in Table 27 (for

Headphone outputs) and Table 28 (for Line outputs). See also the “Analogue Outputs” section for

details of these output pins, including recommended external components.

The volume and mute status of each analogue output can be controlled individually using the register

bits described in Table 27 and Table 28.

To prevent “zipper noise” when a volume adjustment is made, a zero-cross function is provided on all

output paths. When this function is enabled, volume updates will not take place until a zero-crossing

is detected. In the event of a long period without zero-crossings, a timeout will apply. The timeout

must be enabled by setting the TOCLK_ENA bit, as defined in “Clocking and Sample Rates”.

The volume update bits control the loading of the output driver volume data. For example, when

HPOUT_VU is set to 0, the headphone volume data can be loaded into the respective control

are updated when a 1 is written to HPOUT_VU. This makes it possible to update the gain of a

Left/Right pair of output paths simultaneously.

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