WM8912 datasheet(85/129 Pages) CIRRUS

85 / 129 page

Production Data

WM8912

PD, Rev 4.1, February 2013

WSEQ_DATA is an 8-bit field which contains the data to be written to the selected Control Register.

The WSEQ_DATA_WIDTH field determines how many of these bits are written to the selected

WSEQ_DELAY is a 4-bit field which controls the waiting time between the current step and the next

step in the sequence. The total delay time per step (including execution) is given by:

T = k × (2

WSEQ_DELAY + 8)

where k = 62.5

s (under recommended operating conditions)

This gives a useful range of execution/delay times from 562

s up to 2.048s per step.

WSEQ_EOS is a 1-bit field which indicates the End of Sequence. If this bit is set, then the Control

Write Sequencer will automatically stop after this step has been executed.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R108 (6Ch)

Write

Sequencer

4:0

WSEQ_WRITE_

INDEX [4:0]

0_0000

Sequence Write Index. This is the

memory location to which any updates

to R109 and R110 will be copied.

0 to 31 = RAM addresses

R109 (6Dh)

Write

Sequencer

14:12

WSEQ_DATA_

WIDTH [2:0]

000

Width of the data block written in this

sequence step.

000 = 1 bit

001 = 2 bits

010 = 3 bits

011 = 4 bits

100 = 5 bits

101 = 6 bits

110 = 7 bits

111 = 8 bits

11:8

WSEQ_DATA_S

TART [3:0]

0000

Bit position of the LSB of the data

block written in this sequence step.

0000 = Bit 0

…

1111 = Bit 15

7:0

WSEQ_ADDR

[7:0]

0000_000

Control Register Address to be written

to in this sequence step.

R110 (6Eh)

Write

Sequencer

WSEQ_EOS

End of Sequence flag. This bit

indicates whether the Control Write

Sequencer should stop after executing

this step.

0 = Not end of sequence

1 = End of sequence (Stop the

sequencer after this step).

11:8

WSEQ_DELAY

[3:0]

0000

Time delay after executing this step.

Total delay time per step (including

execution)=

62.5µs × (2^WSEQ_DELAY + 8)

7:0

WSEQ_DATA

[7:0]

0000_000

Data to be written in this sequence

step. When the data width is less than

8 bits, then one or more of the MSBs of

WSEQ_DATA are ignored. It is

recommended that unused bits be set

to 0.

Table 57 Write Sequencer Control - Programming a Sequence

Note that a ‘Dummy’ write can be inserted into a control sequence by commanding the sequencer to

write a value of 0 to bit 0 of Register R255 (FFh). This is effectively a write to a non-existent register

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