5CSXFC6D6F31C7N datasheet(23/93 Pages) INTEL

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Differential I/O Standard Specifications

Table 20.

Differential I/O Standard Specifications for Cyclone V Devices

Differential inputs are powered by VCCPD which requires 2.5 V.

I/O Standard

VCCIO (V)

VID (mV)(21)

VICM(DC) (V)

VOD (V)(22)

VOCM (V)(22)(23)

Min

Typ

Max

Min

Condition

Max

Min

Condition

Max

Min

Typ

Max

Min

Typ

Max

PCML

Transmitter, receiver, and input reference clock pins of high-speed transceivers use the PCML I/O standard. For transmitter, receiver, and reference clock

I/O pin specifications, refer to Transceiver Specifications for Cyclone V GX, GT, SX, and ST Devices table.

2.5 V LVDS(24)

2.375

2.5

2.625

100

VCM = 1.25

—

0.05

DMAX ≤ 700

Mbps

1.80

0.247

—

0.6

1.125

1.25

1.375

1.05

DMAX > 700

Mbps

1.55

BLVDS(25)(26)

2.375

2.5

2.625

100

—

RSDS (HIO)(27)

2.375

2.5

2.625

100

VCM = 1.25

—

0.25

—

1.45

0.1

0.2

0.6

0.5

1.2

1.4

Mini-LVDS (HIO)

(28)

2.375

2.5

2.625

200

—

600

0.300

—

1.425

0.25

—

0.6

1.2

1.4

continued...

(21) The minimum VID value is applicable over the entire common mode range, VCM.

(22) RL range: 90 ≤ RL ≤ 110 Ω.

(23) This applies to default pre-emphasis setting only.

(24) For optimized LVDS receiver performance, the receiver voltage input range must be within 1.0 V to 1.6 V for data rate above 700

Mbps and 0.00 V to 1.85 V for data rate below 700 Mbps.

(25) There are no fixed VICM, VOD, and VOCM specifications for BLVDS. They depend on the system topology.

(26) For more information about BLVDS interface support in Intel devices, refer to AN522: Implementing Bus LVDS Interface in Supported

Intel Device Families.

(27) For optimized RSDS receiver performance, the receiver voltage input range must be within 0.25 V to 1.45 V.

(28) For optimized mini-LVDS receiver performance, the receiver voltage input range must be within 0.300 V to 1.425 V.

Cyclone V Device Datasheet

CV-51002 | 2019.01.25

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Cyclone V Device Datasheet

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