4

Device features

4.1

Identification page

The identification page (64 bytes) is an additional page that can be read or written and (later) permanently

locked in read-only mode. It is read or written by issuing the read or write identification page instruction. These

instructions use the same protocol and format as the random address read or page write (from/into memory array)

except for the following differences (refer to Table 5, Table 6 and Table 7):

•

Device type identifier = 1011b

•

MSB address bits A15/A6 are don't care except for address bit A10 which must be ‘0’

•

LSB address bits A5/A0 define the byte address inside the identification page

If the identification page is locked, the data bytes transferred during the write identification page instruction are not

acknowledged (NoACK).

4.2

Configurable device address register (CDA)

As the M24256X-F is delivered in 4-ball WLCSP without chip enable inputs, the device provides a non-volatile

8-bit register allowing the user to define a configurable device address (CDA) and a specific bit, named device

address lock, to freeze the configurable device address register. This register can be read and written by issuing

the read or write configurable device address instruction. These instructions use the same protocol and format

as the random address read or page write (from/into memory array) except for the following differences (refer to

Table 5, Table 6 and Table 7):

•

Device type identifier = 1010b

•

MSB address bits A15/A14/A13 must be equal to '110' (A15 = 1, A14 = 1 and A13 = 0)

•

MSB address bits A12/A8 are don't care

•

LSB address bits A7/A0 are don't care

The description of the configurable device address register is given in Table 3.

Table 3. Configurable device address register

bit 7

bit 6

bit 5

bit 4

bit 3

bit 2

bit 1

bit 0

x (1)

x (1)

x (1)

x(1)

C2

C1

C0

DAL

1. x = Don’t care bits, read as 0.

Note:

Factory delivery of the register is 00000000b.

M24256X-F

Device features

DS12380 - Rev 2

page 6/42