SX28ACSLASHDP datasheet(10/51 Pages) PARALLAX

10 / 51 page

Parallax SX20AC/SX28AC

www.parallax.com

Page 10 of 51

Rev 1.6 11/20/2006

Figure 3-2

Port B, Port C

Configuration

For example, suppose all four Port A pins are configured

as outputs and you wish to set RA0 and RA1 high, and

RA2 and RA3 low:

mov W,#$03

;load W with the value 03h

;(bits 0 and 1 high)

mov $05,W

;write 03h to Port A data

;register

The second “mov” instruction in this example writes the

Port A data register (RA), which controls the output levels

of the four Port A pins, RA0 through RA3. Because Port

A has only four I/O pins, only the four least significant

bits of this register are used. The four high-order register

bits are “don’t care” bits. Port B and Port C are both eight

bits wide, so the full widths of the RB and RC registers

are used.

When a write is performed to a bit position for a port that

has been configured as an input, a write to the port data

on the pin. If later that pin is configured to operate as an

output, it will reflect the value that has been written to the

data register.

When a read is performed from a bit position for a port,

the operation is actually reading the voltage level on the

pin itself, not necessarily the bit value stored in the port

data register. This is true whether the pin is configured to

operate as an input or an output. Therefore, with the pin

configured to operate as an input, the data register

contents have no effect on the value that you read. With

the pin configured to operate as an output, what is read

generally matches what has been written to the register.

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