PIC16F570 datasheet(28/129 Pages) MICROCHIP

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PIC16F570

DS40001684E-page 28

 2013-2014 Microchip Technology Inc.

6.5

I/O Interfacing

The equivalent circuit for an I/O port pin is shown in

Figure 6-1. All port pins, except the MCLR pin which is

input-only, may be used for both input and output

operations. For input operations, these ports are non-

latching. Any input must be present until read by an

input instruction (e.g., MOVF PORTB, W). The outputs

are latched and remain unchanged until the output

latch is rewritten. To use a port pin as output, the

corresponding direction control bit in TRIS must be

cleared (= 0). For use as an input, the corresponding

TRIS bit must be set. Any I/O pin (except MCLR) can

be programmed individually as input or output.

FIGURE 6-1:

BLOCK DIAGRAM OF I/O

PIN (Example shown of

RB7 with Weak Pull-up

and Wake-up on Change)

Data

Bus

Port

TRIS ‘f’

Data

TRIS

RD Port

Reg

Latch

Reset

Note 1:

I/O pins have protection diodes to VDD and

VSS.

2: Pin enabled as analog for CVREF or

comparator.

Pin Change

RxPU

CVREF2 pin Ebl

COMP pin Ebl

CVREF2

COMP

I/O Pin(1)

(2)

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