LP5521 datasheet(17/51 Pages) TI2

17 / 51 page

LP5521

www.ti.com

SNVS441I – JANUARY 2007 – REVISED NOVEMBER 2016

Product Folder Links: LP5521

Submit Documentation Feedback

7.3.5.3 TRIG Pin

The TRIG pin can function as an external trigger input or output. External trigger signal is active low; that is,

when trigger is sent or received the pin is pulled to GND. TRIG is an open-drain pin and external pullup resistor

is needed for trigger line. External trigger input signal must be at least two 32-kHz clock cycles long to be

recognized. Trigger output signal is three 32-kHz clock cycles long. If TRIG pin is not used on application,

connected the TRIG pin to GND to prevent floating of this pin and extra current consumption.

7.3.5.4 ADDR_SEL0,1 Pins

The ADDR_SEL0,1 pins define the chip I2C address. Pins are referenced to VDD signal level. See I

2C-Compatible

Serial Bus Interface for I2C address definitions.

7.3.5.5 CLK_32K Pin

The CLK_32K pin is used for connecting an external 32-kHz clock to LP5521. External clock can be used to

synchronize the sequence engines of several LP5521. Using external clock can also improve automatic power

save mode efficiency, because internal clock can be switched off automatically when device has entered power

save mode, and external clock is present. See application note LP5521 Power Efficiency Considerations

(SNVA185) for more information.

Device can be used without the external clock. If external clock is not used on the application, connect the

CLK_32K pin to GND to prevent floating of this pin and extra current consumption.

LP5521 Datenblatt(PDF) 17 Page - Texas Instruments