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Datenblatt-Suchmaschine für elektronische Bauteile |
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Datenblatt-Suchmaschine für elektronische Bauteile |
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LP5521 Datenblatt(PDF) 22 Page - Texas Instruments |
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LP5521 Datenblatt(HTML) 22 Page - Texas Instruments |
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22 / 51 page  ack from slave start MSB Chip id LSB SCL ack from slave w MSB Register Addr LSB rs r MSB Data LSB stop ack from slave nack from master repeated start data from slave SDA start id = 011 0010b w ack address = 00H ack rs r ack address 00H data nack stop MSB Chip Address LSB id = 011 0010b start MSB Chip id LSB w ack MSB Register Addr LSB ack MSB Data LSB ack stop ack from slave ack from slave ack from slave SCL SDA start id = 011 0010b w ack address = 02H ack ack address 02H data stop 22 LP5521 SNVS441I – JANUARY 2007 – REVISED NOVEMBER 2016 www.ti.com Product Folder Links: LP5521 Submit Documentation Feedback Copyright © 2007–2016, Texas Instruments Incorporated <>Data from master [ ] Data from slave Figure 23. Register Write Format When a READ function is to be accomplished, a WRITE function must precede the READ function, as shown in Figure 24. w = write (SDA = 0) r = read (SDA = 1) ack = acknowledge (SDA pulled down by either master or slave rs = repeated start id = 7-bit chip address Figure 24. Register Read Format 7.5.2 LED Controller Operation Modes Operation modes are defined in register address 01H. Each output channel (R, G, B) operation mode can be configured separately. MODE registers are synchronized to a 32-kHz clock. Delay between consecutive I2C writes to OP_MODE register (01H) need to be longer than 153 µs (typical). Table 10. OP_MODE Register (01H): NAME BIT DESCRIPTION R_MODE 5:4 R channel operation mode 00b = Disabled, reset R channel PC 01b = Load program to SRAM, reset R channel PC 10b = Run program defined by R_EXEC 11b = Direct control, reset R channel PC G_MODE 3:2 G channel operation mode 00b = Disabled, reset G channel PC 01b = Load program to SRAM, reset G channel PC 10b = Run program defined by G_EXEC 11b = Direct control, reset G channel PC B_MODE 1:0 B channel operation mode 00b = Disabled, reset B channel PC 01b = Load program to SRAM, reset B channel PC 10b = Run program defined by B_EXEC 11b = Direct control, reset B channel PC |
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