CC1010-RTY1 datasheet(81/150 Pages) TI2

81 / 150 page

CC1010

SWRS047A

Page 81 of 146

ADCON (0x93) - ADC Control Register

Bit

Name

R/W

Reset value

Description

AD_PD

R/W

ADC Power down bit.

0 : ADC is active

1 : ADC is in power down

Reserved, read as 0

5:4

ADCM(1:0)

R/W

ADC Mode:

00 :

Single-conversion mode. (Interrupt when

threshold condition holds true, stop after one

conversion.)

01 :

Multi-conversion mode, continuous. (Interrupt

when threshold condition holds true, continue sampling.)

10 :

Multi-conversion mode, stopping. (Interrupt

when threshold condition holds true, stop sampling.)

11:

Multi-conversion mode, reset-generating.

(Generate reset when threshold condition holds true.)

ADCREF

R/W

Select the internal ADC Voltage Reference

0 : Voltage reference is VDD

1 : Voltage reference is 1.25 V, generated on chip.

ADCRUN

R/W

ADC run control. Setting this bit in software will start

ADC operation in single- or multi-conversion mode. In

single conversion mode this bit is cleared by hardware

when the single conversion is done. Multi-conversion

operation can be halted at the end of the current

conversion by clearing this bit. (When ADCM=10 the

hardware clears this bit when stopping.)

1:0

ADADR(1:0)

R/W

Select the analog input to the ADC

00 : Mux data from the AD0 pin

01 : Mux data from the AD1 pin

10 : Mux data from the AD2 (RSSI/IF) pin

11 : Mux data from the AD0 pin with AD1 as an external

reference. ADCREF is ignored in this setting

ADDATL (0x94) - ADC Data Register, Low Byte

Bit

Name

R/W

Reset value

Description

7:0

ADDAT(7:0)

0x00

8 LSB of ADC data output

ADDATH (0x95) - ADC Data Register, High Bits

Bit

Name

R/W

Reset value

Description

7:2

0x00

Reserved, read as 0

1:0

ADDAT(9:8)

0x00

2 MSB of ADC data output, latched when ADDATL is

read

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