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WM8739LEDS Datenblatt(PDF) 15 Page - Wolfson Microelectronics plc

Teilenummer WM8739LEDS
Bauteilbeschribung  STEREO AUDIO ADC
PDF  35 Pages
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Hersteller  WOLFSON [Wolfson Microelectronics plc]
Direct Link  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM8739LEDS Datenblatt(HTML) 15 Page - Wolfson Microelectronics plc

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WM8739 / WM8739L
Advanced Information
AI Rev 2.2 September 2001
15
For applications where a component other than the WM8739 will generate the reference clock, the
external system can be applied directly through the XTI/MCLK input pin with no software
configuration necessary. Note that in this situation, the oscillator circuit of the WM8739 can be safely
powered down to conserve power (see POWER DOWN section)
CRYSTAL OSCILLATOR
The WM8739 includes a crystal oscillator circuit that allows the audio system’s reference clock to be
generated on the device. The crystal oscillator is a low radiation type, designed for low EMC. A
typical application circuit is shown in Figure 12.
XTI/MCLK
XTO
DGND
DGND
Cp
Cp
Figure 12 Crystal Oscillator Application Circuit
For crystals with a 30pF fundamental load capacitance, a value of 5pF for Cp is recommended.
The WM8739 crystal oscillator provides an extremely low jitter clock source. Low jitter clocks are a
requirement for a high quality audio ADC, regardless of the converter architecture. The WM8739
architecture is less susceptible than most converter techniques but still requires clocks with less than
approximately 1ns of jitter to maintain performance. In applications where there is more than one
source for the master clock, it is recommended that the clock is generated by the WM8739 to
minimise such problems.
CORE CLOCK
The WM8739 DSP core can be clocked either by MCLK or MCLK divided by 2. This is controlled by
software as shown in Table 4 below.
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
0001000
Sampling
Control
6
CLKIDIV2
0
Core Clock divider select
1 = Core Clock is MCLK divided by 2
0 = Core Clock is MCLK
Table 4 Software Control of Core Clock
Having a programmable MCLK divider allows the device to be used in applications where higher
frequency master Clocks are available. For example the device can support 512fs master clocks
whilst fundamentally operating in a 256fs mode.
DIGITAL AUDIO INTERFACES
WM8739 may be operated in either one of the 4 offered audio interface modes. These are:
•
Right justified
•
Left justified
•
I
2S
•
DSP mode
All four of these modes are MSB first.



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