WM8739LEDS datasheet(16/35 Pages) WOLFSON

16 / 35 page

WM8739 / WM8739L

Advanced Information

AI Rev 2.2 September 2001

The digital audio interface takes the data from the internal ADC digital filters and places it on

ADCDAT and ADCLRC. ADCDAT is the formatted digital audio data stream output from the ADC

digital filters with left and right channels multiplexed together. ADCLRC is an alignment clock that

controls whether Left or Right channel data is present on the ADCDAT line. ADCDAT and ADCLRC

are synchronous with the BCLK signal with each data bit transition signified by a BCLK high to low

transition. ADCDAT is always an output.

BCLK and ADCLRC maybe an input or an output

depending whether the device is in master or slave mode. Refer to the MASTER/SLAVE

OPERATION section.

There are four digital audio interface formats accommodated by the WM8739. These are shown in

the figures below. Refer to the Electrical Characteristic section for timing information.

Left Justified mode is where the MSB is available on the first rising edge of BCLK following a LRCLK

transition.

LEFT CHANNEL

RIGHT CHANNEL

ADCLRC

BCLK

ADCDAT

1/fs

n-2

n-1

LSB

MSB

n-2

n-1

LSB

MSB

Figure 13 Left Justified Mode

2S mode is where the MSB is available on the 2nd rising edge of BCLK following a LRCLK transition.

LEFT CHANNEL

RIGHT CHANNEL

ADCLRC

BCLK

ADCDAT

1/fs

n-2

n-1

LSB

MSB

n-2

n-1

LSB

MSB

1 BCLK

Figure 14 I

2S Mode

Right Justified mode is where the LSB is available on the rising edge of BCLK preceding a LRCLK

transition, yet MSB is still transmitted first.

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