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WM8739LEDS Datenblatt(PDF) 22 Page - Wolfson Microelectronics plc |
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WM8739LEDS Datenblatt(HTML) 22 Page - Wolfson Microelectronics plc |
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22 / 35 page ![]() WM8739 / WM8739L Advanced Information AI Rev 2.2 September 2001 22 USB MODE SAMPLE RATES In USB mode the MCLK/crystal oscillator input is 12MHz only. SAMPLING RATE MCLK FREQUENCY SAMPLE RATE REGISTER SETTINGS DIGITAL FILTER TYPE kHz MHz BOSR SR3 SR2 SR1 SR0 48 12.000 0 0 0 0 0 0 44.1 (Note 2) 12.000 1 1 0 0 0 1 8 12.000 0 0 0 1 0 0 8 (Note 1) 12.000 1 1 0 1 0 1 32 12.000 0 0 1 1 0 0 96 12.000 0 0 1 1 1 3 88.2 (Note 3) 12.000 1 1 1 1 1 2 Table 11 USB Mode Sample Rate Look-up Table Notes: 1. 8k not exact, actual = 8.021kHz 2. 44.1k not exact, actual = 44.118kHz 3. 88.2k not exact, actual = 88.235kHz 4. All other combinations of BOSR and SR[3:0] that are not in the truth table are invalid The table above can be used to set up the device to work with various sample rate combinations. For example if the user wishes to use the WM8739 in USB mode with the ADC sample rate at 48kHz, then the device should be programmed with BOSR = 0, SR3 = 0, SR2 = 0, SR1 = 0 and SR0 = 0. The ADC will then operate with a Digital Filter of type 0, refer to Digital Filter Characteristics section for an explanation of the different filter types. The BOSR bit represents the base over-sampling rate. This is the rate that the WM8739 digital signal processing is carried out at and the sampling rate will always be a sub-multiple of this. In USB mode, with BOSR = 0, the base over-sampling rate is defined at 250fs, with BOSR = 1, the base over- sampling rate is defined at 272fs. This can be used to determine the actual audio sampling rate produced by the ADC. Example scenarios are: 1. with a requirement that the ADC data sampling rate is 8KHz the device is programmed with BOSR = 0 (250fs), SR3 = 0, SR2 = 0, SR1 = 1, SR0 = 0.The ADC will then be exactly 8kHz (derived from 12MHz/250 x 1/6). 2. with a requirement that ADC data rate is 8KHz the device is programmed with BOSR = 1 (272fs), SR3 = 0, SR2 = 0, SR1 = 1, SR0 = 0. The ADC will not output data at exactly 8kHz, instead it will be 8.021kHz (derived from 12MHz/272 x 2/11). A slight (sub 0.5%) pitch shift will therefore result in the 8kHz audio data and (more importantly) the user must ensure that the data across the digital interface is correctly synchronised at the 8.021kHz rate. |
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