LAN9115 datasheet(71/114 Pages) MICROCHIP

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DS00002269A-page 71

LAN9115

Bits

Description

Type

Default

31:14

RESERVED

13-12

Power Management Mode (PM_MODE)

– These bits set the LAN9115 into

the appropriate Power Management mode. Special care must be taken when

modifying these bits.

Encoding:

00b – D0 (normal operation)

01b – D1 (wake-up frame and magic packet detection are enabled)

10b – D2 (can perform energy detect)

11b – RESERVED - Do not set in this mode

Note:

When the LAN9115 is in a any of the reduced power modes, a write

of any data to the BYTE_TEST register will wake-up the device. DO

NOT PERFORM WRITES TO OTHER ADDRRESSES while the

READY bit in this register is cleared.

00b

RESERVED

PHY Reset (PHY_RST) – Writing a ‘1’ to this bit resets the PHY. The internal

logic automatically holds the PHY reset for a minimum of 100us. When the

PHY is released from reset, this bit is automatically cleared. All writes to this

bit are ignored while this bit is high.

Wake-On-Lan Enable (WOL_EN) – When set, the PME signal (if enabled with

PME_EN) will be asserted in accordance with the PME_IND bit upon a WOL

event. When set, the PME_INT will also be asserted upon a WOL event,

regardless of the setting of the PME_EN bit.

R/W

Energy-Detect Enable (ED_EN) - When set, the PME signal (if enabled with

PME_EN) will be asserted in accordance with the PME_IND bit upon an

Energy-Detect event. When set, the PME_INT will also be asserted upon an

Energy Detect event, regardless of the setting of the PME_EN bit.

R/W

RESERVED

PME Buffer Type (PME_TYPE) – When cleared, enables PME to function as

an open-drain buffer for use in a Wired-Or configuration. When set, the PME

output is a Push-Pull driver. When configured as an open-drain output the

PME_POL field is ignored, and the output is always active low.

R/W

NASR

5-4

WAKE-UP Status (WUPS) – This field indicates the cause of a wake-up event

detection as follows

00b -- No wake-up event detected

01b -- Energy detected

10b -- Wake-up frame or magic packet detected

11b -- Indicates multiple events occurred

WUPS bits are cleared by writing a ‘1’ to the appropriate bit. The device must

return to the D0 state (READY bit set) before these bits can be cleared.

Note:

In order to clear this bit, it is required that all event sources be

cleared as well. The event sources are described in FIGURE 3-11:

PME and PME_INT Signal Generation on page 32.

R/WC

PME indication (PME_IND). The PME signal can be configured as a pulsed

output or a static signal, which is asserted upon detection of a wake-up event.

When set, the PME signal will pulse active for 50mS upon detection of a wake-

up event.

When clear, the PME signal is driven continuously upon detection of a wake-

up event.

The PME signal can be deactivated by clearing the WUPS bits, or by clearing

the appropriate enable (refer to Section 3.10.2.3, "Power Management Event

Indicators," on page 31).

R/W

PME Polarity (PME_POL). This bit controls the polarity of the PME signal.

When set, the PME output is an active high signal. When reset, it is active

low. When PME is configured as an open-drain output this field is ignored, and

the output is always active low.

R/W

NASR

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