LAN9115 datasheet(77/114 Pages) MICROCHIP

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DS00002269A-page 77

LAN9115

5.3.23

E2P_CMD – EEPROM COMMAND REGISTER

This register is used to control the read and write operations with the Serial EEPROM.

TABLE 5-5:

BACKPRESSURE DURATION BIT MAPPING

Backpressure Duration

[19:16]

100Mbs Mode

10Mbs Mode

5uS

7.2uS

10uS

12.2uS

15uS

17.2uS

25uS

27.2uS

50uS

52.2uS

100uS

102.2uS

150uS

152.2uS

200uS

202.2uS

250uS

252.2uS

300uS

302.2uS

350uS

352.2uS

400uS

402.2uS

450uS

452.2uS

500uS

502.2uS

550uS

552.2uS

600uS

602.2uS

Offset:

B0h

Size:

32 bits

Bits

Description

Type

Default

EPC Busy: When a 1 is written into this bit, the operation specified in the

EPC command field is performed at the specified EEPROM address. This

bit will remain set until the operation is complete. In the case of a read this

means that the host can read valid data from the E2P data register. The

E2P_CMD and E2P_DATA registers should not be modified until this bit is

cleared. In the case where a write is attempted and an EEPROM is not

present, the EPC Busy remains busy until the EPC Time-out occurs. At that

time the busy bit is cleared.

Note:

EPC busy will be high immediately following power-up or reset.

After the EEPROM controller has finished reading (or attempting

to read) the MAC address from the EEPROM the EPC Busy bit is

cleared.

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