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WM8281ECS/R Datenblatt(PDF) 279 Page - Cirrus Logic |
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WM8281ECS/R Datenblatt(HTML) 279 Page - Cirrus Logic |
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279 / 392 page ![]() WM8281 Rev 4.0 279 A similar procedure applies for the deriviation of the FLL Synchroniser parameters - assuming that this function is used. The FLLn_SYNC_FRATIO field selects the frequency division ratio of the FLL synchroniser input. The FLLn_GAIN and FLLn_SYNC_DFSAT fields are used to optimise the FLL, according to the input frequency. These fields should be set as described in Table 105. Note that the FLLn_SYNC_FRATIO register coding is not the same as the FLLn_FRATIO register. SYNCHRONISER FREQUENCY FSYNC FLLn_SYNC_FRATIO FLLn_SYNC_GAIN FLLn_SYNC_DFSAT 1MHz - 13.5MHz 0h (divide by 1) 4h (16x gain) 0 (wide bandwidth) 256kHz - 1MHz 1h (divide by 2) 2h (4x gain) 0 (wide bandwidth) 128kHz - 256kHz 2h (divide by 4) 0h (1x gain) 0 (wide bandwidth) 64kHz - 128kHz 3h (divide by 8) 0h (1x gain) 1 (narrow bandwidth) Less than 64kHz 4h (divide by 16) 0h (1x gain) 1 (narrow bandwidth) Table 105 Selection of FLLn_SYNC_FRATIO, FLLn_SYNC_GAIN, FLLn_SYNC_DFSAT The FLL operating frequency, FVCO, is the same frequency calculated as described above. The value of N.K (Sync) can then be determined as follows: N.K (Sync) = FVCO / (FLLn_SYNC_FRATIO x 3 x FSYNC) Note that, in the above equations: FSYNC is the synchroniser input frequency, after division by FLLn_SYNCCLK_DIV, where applicable. FLLn_SYNC_FRATIO is the FVCO clock ratio (1, 2, 4, 8 or 16). The value of N (Sync) is held in the FLLn_SYNC_N register field. The value of K (Sync) is determined by the ratio FLLn_SYNC_THETA / FLLn_SYNC_LAMBDA. The FLLn_SYNC_N, FLLn_SYNC_THETA and FLLn_SYNC_LAMBDA fields are all coded as integers (LSB = 1). In Fractional Mode (FLLn_THETA > 0), the register fields FLLn_THETA and FLLn_LAMBDA can be calculated as described below. Note that an equivalent procedure is also used to derive the FLLn_SYNC_THETA and FLLn_SYNC_LAMBDA register values from the corresponding synchroniser parameters. Calculate GCD(FLL) using the ‘Greatest Common Denominator’ function: GCD(FLL) = GCD(FLLn_FRATIO x FREF, FVCO / 3) where GCD(x, y) is the greatest common denominator of x and y FREF is the input frequency, after division by FLLn_REFCLK_DIV, where applicable. Next, calculate FLLn_THETA and FLLn_LAMBDA using the following equations: FLLn_THETA = ((FVCO / 3) - (FLL_N x FLLn_FRATIO x FREF)) / GCD(FLL) FLLn_LAMBDA = (FLLn_FRATIO x FREF) / GCD(FLL) Note that, in Fractional Mode, the values of FLLn_THETA and FLLn_LAMBDA must be co-prime (ie. not divisible by any common integer). The calculation above ensures that the values will be co-prime. The value of K must be a fraction less than 1 (ie. FLLn_THETA must be less than FLLn_LAMBDA). |
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