AT25QL641 datasheet(38/77 Pages) DIALOG

38 / 77 page

AT25QL641

DS-25QL641–130E–10/2018

7.21

Erase / Program Suspend (75h)

The ‘ Erase/Program Suspend’ instruction allows the system to interrupt a Block Erase operation, or a Page

Program, Quad Data Input Page Program, Quad Page Program operation.

The Erase Suspend is valid only during the Block or Block erase operation. The Write Status Register-1 (01h), Write

Status Register-2 (31h) instruction and Erase instructions (20h, 52h, D8h, C7h, 60h) are not allowed during an Erase

Suspend operation. During the Chip Erase operation, the Erase Suspend instruction is ignored.

Program Suspend is valid only during the Page Program, Quad Data Input Page Program or Quad Page Program

operation. The Write Status Register-1 (01h), Write Status Register-2 (31h) instruction, Program instructions (02h and

33h) and Erase Instructions (20h, 52h, D8h, C7h, 60h) are not allowed during Program Suspend.

The Erase/Program Suspend instruction “75h” is accepted by the device only if the SUS bit in the Status Register equals

to 0 and the BUSY bit equals to 1 while a Block Erase or a Page Program operation is on-going. If the SUS bit equals

to 1 or the BUSY bit equals to 0, the Suspend instruction is ignored by the device. A maximum time of “t

SUS” (see Table

8-7, AC Electrical Characteristics

) is required to suspend the erase or program operation. After Erase/Program Suspend,

the SUS bit in the Status Register is set (0 to 1) immediately and the BUSY bit in the Status Register is cleared (1 to 0)

within “t

SUS”. For a previously resumed Erase/Program operation, it is also required that the Suspend instruction “75h” is

not issued earlier than a minimum of time of “t

SUS” following the preceding Resume instruction “7Ah”.

Unexpected power off during the Erase/Program suspend state resets the device and release the suspend state. The

SUS bit in the Status Register also resets to 0. The data within the page, or block that was being suspended may

become corrupted. It is recommended for the user to implement system design techniques against the accidental

power interruption and preserve data integrity during erase/program suspend state. (Please refer to Figure 7-33 and

Figure 7-34).

Figure 7-33. Erase Suspend Instruction (SPI Mode)

AT25QL641 Datenblatt(PDF) 38 Page - Dialog Semiconductor