CC1010-RTY1 datasheet(32/152 Pages) TI

32 / 152 page

CC1010

SWRS047

Page 32 of 152

15.7 External interrupts

Two external interrupt pins are available in

the

CC1010. They are located on pins P3.2

and P3.3, and can be set up to be either

level- or edge sensitive by setting the IT1

and IT2 bits in the TCON register (see

page 54 for more information). When the

external interrupts are activated in the IE

cycles will always generate an interrupt.

The

CC1010 will wake up from Idle mode

when an external interrupt pin is activated,

but the external interrupt pins cannot wake

the

CC1010 from Power-Down mode.

15.8 Main Crystal Oscillator

An external clock signal or the main crystal

oscillator can be used as main frequency

reference and microcontroller clock signal.

An external clock signal should be

connected to XOSC_Q1, while XOSC_Q2

should be left open.

The

microcontroller

core

and

main

oscillator will operate at any frequency in

the range 3 - 24 MHz. However, the

crystal frequency should be in the range 3-

4, 6-8 or 9-24 MHz because the crystal

frequency is used as reference for the

data rate in the RF transceiver part (as

well as other internal functions). The

following frequencies are recommended

as they will provide “standard” data rates:

3.6864,

7.3728,

11.0592,

14.7456,

18.4320 and 22.1184 MHz. The selected

crystal frequency range must be set in

MODEM0.XOSC_FREQ(2:0) in order to

get the correct data rate (see page 93).

Using the main crystal oscillator, the

crystal must be connected between the

pins

XOSC_Q1

and

XOSC_Q2.

The

oscillator is designed for parallel mode

operation of the crystal. In addition loading

capacitors (C171 and C181) for the crystal

are required. The loading capacitor values

depend on the total load capacitance, CL,

specified for the crystal. The total load

capacitance seen between the crystal

terminals should equal CL for the crystal to

oscillate at the specified frequency.

parasitic

181

171

The parasitic capacitance is constituted by

pin input capacitance and PCB stray

capacitance. Typically the total parasitic

capacitance is 3-5pF. A trimming capacitor

may be placed across C171 for initial

tuning if necessary.

The crystal oscillator is of an advanced

amplitude-regulated type. A high current is

used to start up the oscillations. When the

amplitude builds up, the current is reduced

to what is necessary to maintain a 600

mVpp amplitude. This ensures a fast start-

up, keeps the current consumption and the

drive level to a minimum and makes the

oscillator insensitive to ESR variations. As

long as you follow the crystal loading

capacitance requirements, do not worry

about ESR or drive levels (a typical drive

level is 4 µW for 3 MHz).

The main crystal oscillator circuit is shown

in Figure 4. Typical component values for

different values of CL are given in Table

14.

Recommended

load

capacitance

versus frequency is given in Table 10 on

page 12.

The initial tolerance, temperature drift,

ageing and load pulling should be carefully

specified in order to meet the required

frequency

accuracy

certain

application.

specifying

the

total

expected frequency accuracy in SmartRF

Studio together with data rate and

frequency separation, the software will

calculate the total bandwidth and compare

to the available IF bandwidth. Any

contradictions will be reported by the

software and a more accurate crystal will

be recommended if required.

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