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ADP1876ACPZ-R7 Datenblatt(PDF) 4 Page - Analog Devices

Teilenummer ADP1876ACPZ-R7
Bauteilbeschribung  600 kHz Dual Output Synchronous Buck
PDF  24 Pages
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Hersteller  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADP1876ACPZ-R7 Datenblatt(HTML) 4 Page - Analog Devices

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ADP1876
Data Sheet
Rev. A | Page 4 of 24
SPECIFICATIONS
All limits at temperature extremes are guaranteed via correlation using standard statistical quality control. VIN = 12 V. The specifications
are valid for TJ = −40°C to +125°C, unless otherwise specified. Typical values are at TA = 25°C.
Table 1.
Parameter
Symbol
Test Conditions/Comments
Min
Typ
Max
Unit
POWER SUPPLY
Input Voltage
V
IN
2.75
20
V
Undervoltage Lockout Threshold
IN
UVLO
V
IN rising
2.45
2.6
2.75
V
V
IN falling
2.4
2.5
2.6
Undervoltage Lockout Hysteresis
0.1
V
Quiescent Current
I
IN
EN1 = EN2 = V
IN = 12 V, VFB = VCCO
(no switching)
4.5
5.9
mA
Shutdown Current
I
IN_SD
EN1 = EN2 = GND, V
IN = 5.5 V or 20 V
100
200
µA
ERROR AMPLIFIER
FB Input Bias Current
I
FB
−100
+1
+100
nA
Transconductance
g
m
Sink or source 1 µA
385
550
715
µS
TRK1 Input Bias Current
I
TRK
0 V < V
TRK1 < 1.5 V
−100
+1
+100
nA
CURRENT SENSE AMPLIFIER GAIN
A
CS
Gain resistor connected to DLx,
R
CSG = 47 kΩ ± 5%
2.4
3
3.6
V/V
Gain resistor connected to DLx,
R
CSG = 22 kΩ ± 5%
5.2
6
6.9
V/V
Default setting, R
CSG = open
10.5
12
13.5
V/V
Gain resistor connected to DLx,
R
CSG = 100 kΩ ± 5%
20.5
24
26.5
V/V
OUTPUT CHARACTERICTISTICS
Feedback Accuracy Voltage
V
FB
T
J = −40°C to +85°C, VFB = 0.6 V
−0.85%
+0.6
+0.85%
V
T
J = −40°C to +125°C, VFB = 0.6 V
−1.5%
+0.6
+1.5%
V
Line Regulation of PWM
ΔV
FB/ΔVIN
±0.015
%/V
Load Regulation of PWM
ΔV
FB/ΔVCOMP
V
COMP range 0.9 V to 2.2 V
±0.3
%
Oscillator Frequency
f
OSC
475
600
690
kHz
LINEAR REGULATOR VCCO
VCCO Output Voltage
T
A = 25°C, IVCCO = 100 mA
4.8
5.0
5.18
V
T
J = −40°C to +125°C
4.7
5.0
5.3
V
VCCO Load Regulation
I
VCCO = 0 mA to 100 mA,
35
mV
VCCO Line Regulation
V
IN = 5.5 V to 20 V, IVCCO = 20 mA
10
mV
VCCO Short-Circuit Current1
VCCO < 0.5 V
370
400
mA
VIN to VCCO Dropout Voltage2
V
DROPOUT
I
VCCO = 100 mA, VIN ≤ 5 V
0.33
V
LOGIC INPUTS
EN1, EN2 Threshold
EN1/EN2 rising
0.57
0.63
0.68
V
EN1, EN2 Hysteresis
0.03
V
EN1, EN2 Input Leakage Current
I
EN
V
IN = 2.75 V to 20 V
1
200
nA
GATE DRIVERS (DHx, DLx PINS)
DHx Rise Time
C
DH = 3 nF, VBST − VSW = 5 V
16
ns
DHx Fall Time
C
DH = 3 nF, VBST − VSW = 5 V
14
ns
DLx Rise Time
C
DL = 3 nF
16
ns
DLx Fall Time
C
DL = 3 nF
14
ns
DHx to DLx Dead Time
External 3 nF capacitor is connected to
DHx and DLx
25
ns



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