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ADP1876

Data Sheet

Rev. A | Page 14 of 24

THEORY OF OPERATION

The ADP1876 is a dual output dc-to-dc synchronous buck

controller with integrated drivers that drive N-channel power

MOSFETs. The device operates in current mode for improved

transient response and uses valley current sensing for enhanced

noise immunity. The two outputs are phase shifted 180°. This

reduces the input current ripple and the required input

capacitance.

The integrated boost diodes in the ADP1876 reduce the overall

system cost and component count. The ADP1876 operates at a

fixed frequency of 600 kHz and includes programmable soft

start, current limit, and power good.

INDEPENDENT LOW DROPOUT LINEAR

REGULATOR

In addition to the dual channel step-down controller, a stand-

alone linear dropout (LDO) voltage regulator with a fixed output

of 1.5 V is built into the ADP1876 and operates independently

from the controllers. The output of the LDO delivers up to

150 mA to the load. See the Applications Information section

for more information.

CONTROLLER ARCHITECTURE

The ADP1876 is based on a fixed frequency, current mode

PWM control architecture. The inductor current is sensed by

the voltage drop measured across the external low-side MOSFET

RDSON during the off period of the switching cycle (valley inductor

current). The current sense signal is further processed by the

current sense amplifier. The output of the current sense amplifier is

held, and the emulated current ramp is multiplexed and fed into

the PWM comparator (see Figure 24). The valley current

information is captured at the end of the off period, and the

emulated current ramp is applied at that point when the next on

cycle begins. An error amplifier integrates the error between the

feedback voltage and the generated error voltage from the

COMP pin (see the “from error amp” in Figure 24).

Figure 24. Simplified Control Architecture

As shown in Figure 24, the emulated current ramp is generated

inside the IC but offers programmability through the RAMPx

pin (see Figure 1 for the typical operation circuit). Selecting an

appropriate value resistor from VIN to the RAMPx pin programs

a desired slope compensation value and, at the same time,

provides a feedforward feature. The benefits realized by

deploying this type of control scheme are as follows:

• The turn-on current spike does not corrupt the current ramp.

• The current signal is stable because the current signal is

sampled at the end of the turn-off period, which gives time

for the switch node ringing to settle.

The normal benefits of using current mode control scheme still

apply, such as simplicity of loop compensation. Control logic

enforces antishoot through operation to limit cross conduction of

the internal drivers and external MOSFETs.

Synchronous Rectifier and Dead Time

The synchronous rectifier (low-side MOSFET) improves efficiency

by replacing the Schottky diode that is normally used in an

asynchronous buck regulator. In the ADP1876, the antishoot

through circuit monitors the SW and DL nodes and adjusts the

low-side and high-side drivers to ensure break-before-make

switching to prevent cross conduction or shoot through between

the high-side and low-side MOSFETs. This break-before-make

switching is known as the dead time, which is not fixed and

depends on how fast the MOSFETs are turned on and off. In a

typical application circuit that uses medium sized MOSFETs

with input capacitance of approximately 3 nF, the typical dead

time is approximately 30 ns. When small and fast MOSFETs are

used, the dead time can be as low as 13 ns.

INPUT UNDERVOLTAGE LOCKOUT

When the bias input voltage, VIN, is less than the undervoltage

lockout (UVLO) threshold, the switch drivers stay inactive.

When VIN exceeds the UVLO threshold, the switchers begin

switching.

INTERNAL LINEAR REGULATOR (VCCO)

The internal linear regulator is low dropout, meaning it can

regulate its output voltage, VCCO. VCCO powers the internal

control circuitry and provides power for the gate drivers. It is guar-

anteed to have more than 200 mA of output current capability,

which is sufficient to handle the gate drive requirements of

typical logic threshold MOSFETs. VCCO is always active and

cannot be shut down by the EN1/EN2 pins. Bypass VCCO to

AGND with a 1 µF or greater capacitor.

Because the LDO supplies the gate drive current, the output of

VCCO is subject to sharp transient currents as the drivers switch

and the boost capacitors recharge during each switching cycle.

OSC

ACS

VCS

VIN

RRAMP

IRAMP

FROM

ERROR AMP

DRIVERS

FROM

LOW SIDE

MOSFET

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