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P83C266BDR Datenblatt(PDF) 71 Page - NXP Semiconductors |
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P83C266BDR Datenblatt(HTML) 71 Page - NXP Semiconductors |
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71 / 92 page ![]() 1999 Mar 10 71 Philips Semiconductors Product specification Microcontrollers for PAL/SECAM TV with OSD and VST P8xCx66 family 18.2 EPROM Programming mode In the EPROM programming mode the selected EPROM is under the direct control of the external pins. For entering the programming mode the RESET pin serves as the data input and the XTALIN pin serves as the clock input. There is no need to synchronise the addresses, data, read and write signals with the CPU. To enter the programming mode, the microcontroller must first be reset in accordance to the normal reset procedure to avoid the Idle mode. The programming code is then shifted in serially via the RESET pin and stored in a register. After decoding, the required control signals are generated. 18.2.1 SERIAL PROGRAMMING CODES Once the device has been reset the programming code can be shifted in via the RESET pin. The 10-bit programming code is shown in Fig.45 and defined in Table 85. Table 85 Programming code format BIT FUNCTION 9to6 Stop bits. These are the last 4 bits to be shifted in and always take the value ‘0101’, indicating the end of the test mode code. 5to1 Mode bits. These 5 bits follow the start bit and select the test mode; see Table 86. 0 Start bit. This is the first bit to be shifted in and is always a logic 0, indicating that the following 5 bits are test mode code. Fig.45 Serial programming code. handbook, halfpage MGM683 bit 0 XXXXX 0 1 0 bit 9 Stop bits Mode bits Start bit 01 Table 86 Test mode selection. 18.2.2 ENTERING THE PROGRAMMING MODE The procedure for entering the Programming mode is detailed below and illustrated in Fig.47 1. The normal reset should be active for at least 24 XTALIN clocks: a) The first 10 XTALIN clocks cancel any special modes b) The 24 XTALIN clocks (2 machine cycles) ensure that the CPU core is reset. 2. Shift in the programming code via the RESET pin 3. Wait at least 2 XTALIN clocks until the control signals are ready, then the EPROM address, data and control signals can be applied. The RESET pin should be released within 10 XTALIN clocks to prevent the circuit escaping from EPROM programming mode. 18.2.3 LEAVING THE PROGRAMMING MODE The device will exit the Programming mode when the RESET pin is driven HIGH for at least 10 XTALIN clock cycles. 18.3 Programming and verification It is not recommended to carry out programming/verify operations on a byte basis. It is far better to program all program EPROM (or OSD EPROM) and then verify the contents. 18.4 OSD EPROM bit map and the sequence of programming OSDL and OSDH Each character bit pattern is stored in the on-chip ROM/EPROM. The character displayed on the screen is in a 12 × 18 dot matrix format, however it is stored in the on-chip character ROM in a 12 × 19 format. For the OSD EPROM character the dot matrix is 16 × 19, but only 12 × 19 is used, therefore the high nibble of OSDH must be filled with FH. MODE BITS TEST MODE 54321 00100 Program EPROM 00110 OSD EPROM |
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