T25S16AFEPR datasheet(34/74 Pages) HMSEMI

34 / 74 page

Table 7.1 Command Set (Configuration, Status, Erase, Program Instructions (1), SPI Mode)

Command Name

BYTE 1

(Instruction)

BYTE 2

BYTE 3

BYTE 4

BYTE 5

BYTE 6

Read Status Register-1

05h

SR1[7:0](2)

Read Status Register-2

35h

SR2[7:0](2)

Read Status Register-3

15h/33h

SR3[7:0](2)

Write Enable

06h

Write Enable for Volatile

Status Register

50h

Write Disable

04h

Write Status Registers-1

01h

SR1[7:0](5)

Write Status Registers-2

31h

SR2[7:0]

Write Status Registers-3

11h

SR3[7:0]

Set Burst with Wrap

77h

xxh

W[7:0](3)

Global Block Lock

7Eh

Global Block Unlock

98h

Read Block Lock

3Dh

A23—A16

A15—A8

A7—A0

L7—L0

Individual Block Lock

36h

A23—A16

A15—A8

A7—A0

Individual Block Unlock

39h

A23—A16

A15—A8

A7—A0

Page Program

02h

A23—A16

A15—A8

A7—A0

D7—D0

Quad Page Program

32h

A23—A16

A15—A8

A7—A0

D7—D0(4)

Sector Erase (4 KB)

20h

A23—A16

A15—A8

A7—A0

Block Erase (32 KB)

52h

A23—A16

A15—A8

A7—A0

Block Erase (64 KB)

D8h

A23—A16

A15—A8

A7—A0

Chip Erase

C7h/60h

Erase/Program

Suspend

75h

Erase/Program Resume

7Ah

Enter QPI Mode

38h

Enable Reset

66h

Reset Device

99h

Notes:

1. Data bytes are shifted with Most Significant Bit first. Byte fields with data in parenthesis “()” indicate data

being read from the device on the DO pin.

2. Status Register contents will repeat continuously until CS# terminates the command.

3. Set Burst with Wrap Input format.

IO0 = x, x, x, x, x, x, W4, x]

IO1 = x, x, x, x, x, x, W5, x]

IO2 = x, x, x, x, x, x, W6 x]

IO3 = x, x, x, x, x, x, x,x

4. Quad Page Program Input Data:

IO0 =(D4,D0,...)

IO1 = ( D5,D1,...)

IO2 = ( D6,D2,...)

IO3 =( D7,D3,...)

5. The 01h command could continuously write up to three bytes to registers SR1, SR2, SR3.

HM25Q128A

T25S16AFEPR Datenblatt(PDF) 34 Page - Shenzhen Huazhimei Semiconductor Co., Ltd

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