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STM32U595AI Datenblatt(PDF) 46 Page - STMicroelectronics

Teilenummer STM32U595AI
Bauteilbeschribung  Ultra-low-power Arm® Cortex®-M33 32-bit MCUTrustZone®FPU,240 DMIPS, up to 4 MB Flash, 2.5 MB SRAM, LTDC, MIPI® DSI
PDF  377 Pages
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Hersteller  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32U595AI Datenblatt(HTML) 46 Page - STMicroelectronics

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Functional overview
STM32U59xxx
46/377
DS13633 Rev 1
WWDG (window
watchdog)
OO
-
--
--
--
--
--
SysTick timer
O
O
-
--
--
--
--
--
MDF1 (multi-function
digital filter)
OO
O(17)
O(17)
-
--
--
--
--
ADF1 (audio digital
filter)
OO
O(17)
O(17)
O(17)
O(17)
-
--
--
--
LTDC
O
O
-
--
--
--
--
--
DSI
O
O
-
--
--
--
--
--
GFXMMU
O
O
-
--
--
--
--
--
GPU2D
O
O
-
--
--
--
--
--
DCMI (digital camera
interface)
OO
-
--
--
--
--
--
PSSI (parallel
synchronous slave
interface)
OO
CORDIC
coprocessor
OO
-
--
--
--
--
--
FMAC (filter
mathematical
accelerator)
OO
-
--
--
--
--
--
TSC (touch sensing
controller)
OO
-
--
--
--
--
--
RNG (true random
number generator)
OO
-
--
--
--
--
--
HASH accelerator
O
O
-
--
--
--
--
--
CRC calculation unit
O
O
-
--
--
--
--
--
GPIOs
O
O
O
OO
O
-
(18)
24
pins
-
(18)
24
pins
-
(19)
24
pins
-
1. Y = yes (enabled). O = optional (disabled by default, can be enabled by software). - = not available.
Gray cells highlight the wake-up capability in each mode.
2. The flash memory can be configured in power-down mode. By default, it is not in power-down mode.
3. The SRAMs can be powered on or off independently.
4. The SRAM clock can be gated on or off independently.
5. ECC error interrupt or NMI wake-up from Stop mode.
6. 8-Kbyte, 56-Kbyte or full SRAM2 content can be preserved.
7. Sub-blocks or full SRAM1, SRAM3, and SRAM5, full SRAM2 and SRAM4 can be powered-off to save power consumption.
SRAM1, SRAM2, SRAM3, SRAM4, and SRAM5 can be accessed by GPDMA1 in Stop 0 and Stop 1 modes. SRAM4 can be
accessed by LPDMA1 in Stop 0, Stop 1 and Stop 2 modes.
8. GPDMA transfers are functional and autonomous in Stop mode, and generates a wake-up interrupt on transfer events.
Table 10. Functionalities depending on the working mode(1) (continued)
Peripheral
Run
Sleep
Stop 0/1
Stop 2
Stop 3
Standby Shutdown
VBAT
-
-
-
-
-



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