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Datenblatt-Suchmaschine für elektronische Bauteile |
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Datenblatt-Suchmaschine für elektronische Bauteile |
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STM32U595AI Datenblatt(PDF) 57 Page - STMicroelectronics |
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STM32U595AI Datenblatt(HTML) 57 Page - STMicroelectronics |
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57 / 377 page  DS13633 Rev 1 57/377 STM32U59xxx Functional overview 94 • Text rendering support – A1, A2, A4 and A8 bitmap anti-aliased – Subsampled anti-aliased • Color formats – RGB, grayscale – 32, 24, 16 and 8 bits with/without alpha • Full alpha blending with hardware blender – Programmable blending modes – Source/destination color keying 3.20 Chrom-ART Accelerator controller (DMA2D) The Chrom-ART Accelerator (DMA2D) is a specialized DMA dedicated to image manipulation. It can perform the following operations: • Filling a part or the whole of a destination image with a specific color • Copying a part or the whole of a source image into a part or the whole of a destination image • Copying a part or the whole of a source image into a part or the whole of a destination image with a pixel format conversion • Blending a part and/or two complete source images with different pixel format and copy the result into a part or the whole of a destination image with a different color format. All the classical color coding schemes are supported from 4-bit up to 32-bit per pixel with indexed or direct color mode. The DMA2D has its own dedicated memories for CLUTs (color look-up tables). The main DMA2D features are: • Single AHB master bus architecture • AHB slave programming interface supporting 8/16/32-bit accesses (except for CLUT accesses that are 32-bit) • User programmable working area size • User programmable offset for sources and destination areas expressed in pixels or bytes expressed in pixels or bytes • User programmable sources and destination addresses on the whole memory space • Up to two sources with blending operation • Alpha value can be modified (source value, fixed value or modulated value) • User programmable source and destination color format • Up to 11 color formats supported from 4-bit up to 32-bit per pixel with indirect or direct color coding • Two internal memories for CLUT storage in indirect color mode • Automatic CLUT loading or CLUT programming via the CPU • User programmable CLUT size • Internal timer to control AHB bandwidth • Six operating modes: register-to-memory, memory-to-memory, memory-to-memory with pixel format conversion, memory-to-memory with pixel format conversion and blending, memory-to memory with pixel format conversion, blending and fixed color |
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