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STM32U595AI Datenblatt(PDF) 93 Page - STMicroelectronics

Teilenummer STM32U595AI
Bauteilbeschribung  Ultra-low-power Arm® Cortex®-M33 32-bit MCUTrustZone®FPU,240 DMIPS, up to 4 MB Flash, 2.5 MB SRAM, LTDC, MIPI® DSI
PDF  377 Pages
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Hersteller  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
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STM32U595AI Datenblatt(HTML) 93 Page - STMicroelectronics

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DS13633 Rev 1
93/377
STM32U59xxx
Functional overview
94
–
Configurable framing period
–
Configurable end of frame interrupt
•
USB 2.0 link power management (LPM) support
•
Internal DMA with thresholding support and software selectable AHB burst type in DMA
mode
•
Power saving features such as system stop during USB suspend, switch-off of clock
domains internal to the digital core, PHY and DFIFO power management
•
Dedicated RAM of 4 Kbytes with advanced FIFO control:
–
Configurable partitioning of RAM space into different FIFOs for flexible and
efficient use of RAM
–
Each FIFO able to hold multiple packets
–
Dynamic memory allocation
–
Configurable FIFO sizes that are not powers of two to allow the use of contiguous
memory locations
•
Max guaranteed USB bandwidth for up to one frame (1 ms) without system intervention
•
Support of charging port detection as described in Battery Charging Specification
revision 1.2
Host-mode features:
•
External charge pump for VBUS voltage generation
•
Up to 16 host channels (pipes): each channel is dynamically reconfigurable to allocate
any type of USB transfer
•
Built-in hardware scheduler holding:
–
Up to 16 interrupt plus isochronous transfer requests in the periodic hardware
queue
–
Up to 16 control plus bulk transfer requests in the non-periodic hardware queue
•
Management of a shared Rx FIFO, a periodic Tx FIFO and a non periodic Tx FIFO for
efficient usage of the USB data RAM
Peripheral-mode features:
•
1 bidirectional control endpoint0
•
8 IN endpoints (EPs) configurable to support bulk, interrupt or isochronous transfers
•
8 OUT endpoints configurable to support bulk, interrupt or isochronous transfers
•
Management of a shared Rx FIFO and a Tx-OUT FIFO for efficient usage of the USB
data RAM
•
Management of up to 9 dedicated Tx-IN FIFOs (one for each active IN EP) to put less
load on the application
•
Support for the soft disconnect feature



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