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STM32U595AI Datenblatt(PDF) 69 Page - STMicroelectronics

Teilenummer STM32U595AI
Bauteilbeschribung  Ultra-low-power Arm® Cortex®-M33 32-bit MCUTrustZone®FPU,240 DMIPS, up to 4 MB Flash, 2.5 MB SRAM, LTDC, MIPI® DSI
PDF  377 Pages
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Hersteller  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32U595AI Datenblatt(HTML) 69 Page - STMicroelectronics

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DS13633 Rev 1
69/377
STM32U59xxx
Functional overview
94
•
Left or right data alignment in 12-bit mode
•
Synchronized update capability
•
Noise-wave and triangular-wave generation
•
Sawtooth wave generation
•
Dual DAC channel for independent or simultaneous conversions
•
DMA capability for each channel including DMA underrun error detection
•
Double data DMA capability to reduce the bus activity
•
External triggers for conversion
•
DAC output channel buffered/unbuffered modes
•
Buffer offset calibration
•
Each DAC output can be disconnected from the DAC_OUTx output pin
•
DAC output connection to on chip peripherals
•
Sample and hold mode for low-power operation in Stop mode. The DAC voltage can
be changed autonomously with the DMA while the device is in Stop mode.
•
Autonomous mode to reduce the power consumption for the system
•
Voltage reference input
3.33
Voltage reference buffer (VREFBUF)
The devices embed a voltage reference buffer that can be used as voltage reference for
ADCs, DACs and also as voltage reference for external components through the
VREF+ pin.
Figure 6. VREFBUF block diagram
The internal voltage reference buffer supports four voltages: 1.5 V, 1.8 V, 2.048 V and 2.5 V.
An external voltage reference can be provided through the VREF+ pin when the internal
voltage reference buffer is off.
The VREF+ pin is double-bonded with VDDA on some packages. In these packages the
internal voltage reference buffer is not available.
MSv64430V2
+
-
VREFINT
VREF+
VSSA



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