STM32U595AI datasheet(260/377 Pages) STMICROELECTRONICS

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Electrical characteristics

STM32U59xxx

260/377

DS13633 Rev 1

All I/Os are CMOS- and TTL-compliant (no software configuration required). Their

characteristics cover more than the strict CMOS-technology or TTL parameters. The

coverage of these requirements is shown in the figure below.

Figure 34. I/O input characteristics (all I/Os except BOOT0 and FT_c)

Output driving current

The GPIOs (except PC13, PC14, PC15) can sink or source up to ±8 mA, and sink or source

up to ± 20 mA (with a relaxed VOL/VOH). PC13, PC14, PC15 are limited in source capability:

+3 mA shared between the three I/Os. These GPIOs have the same sink capability than

other GPIOs.

2. Refer to Figure 34: I/O input characteristics (all I/Os except BOOT0 and FT_c).

3. Specified by design. Not tested in production.

4. This parameter represents the pad leakage of the I/O itself. The total product pad leakage is provided by the following

formula: ITotal_Ileak_max = 10 μA + [number of I/Os where VIN is applied on the pad] ₓ Ilkg max.

5. Max (VDDXXX) is the maximum value of all the I/O supplies. The I/O supplies depend on the I/O structure options, as

described in Table 25: Legend/abbreviations used in the pinout table.

6. To sustain a voltage higher than Min (VDD, VDDA, VDDUSB, VDDIO2) +0.3 V, the internal pull-up and pull-down resistors must

be disabled.

7. Refer to Ibias in the OPAMP characteristics table for the values of the OPAMP dedicated input leakage current.

8. The pull-up and pull-down resistors are designed with a true resistance in series with a switchable PMOS/NMOS.

This PMOS/NMOS contribution to the series resistance is minimal (~10% order).

MSv69136V1

STM32U595AI Datenblatt(PDF) 260 Page - STMicroelectronics