PIC16F570 datasheet(20/134 Pages) MICROCHIP

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PIC16F527

DS40001652C-page 20

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4.8

Direct and Indirect Addressing

4.8.1

DIRECT DATA ADDRESSING: BSR

Traditional data memory addressing is performed in

the Direct Addressing mode. In Direct Addressing, the

Bank Select Register bits BSR<1:0>, in the new BSR

address location within that bank comes directly from

the opcode being executed.

BSR<1:0> are the bank select bits and are used to

select the bank to be addressed (00 = Bank 0, 01 =

Bank 1, 10 = Bank 2, 11 = Bank 3).

A new instruction supports the addition of the BSR

called

the

MOVLB

instruction.

See

Section 13.0 “Instruction Set Summary” for more

information.

4.8.2

INDIRECT DATA ADDRESSING:

INDF AND FSR REGISTERS

The INDF Register is not a physical register.

Addressing INDF actually addresses the register

whose address is contained in the FSR Register (FSR

is a pointer). This is indirect addressing.

Reading INDF itself indirectly (FSR = 0) will produce

00h. Writing to the INDF Register indirectly results in a

no-operation (although Status bits may be affected).

The FSR is an 8-bit wide register. It is used in

conjunction with the INDF Register to indirectly

address the data memory area.

The FSR<6:0> bits are used to select data memory

addresses 00h to 1Fh.

FSR<7> is unimplemented and read as ‘0’.

A simple program to clear RAM locations 10h-1Fh

using indirect addressing is shown in Example 4-1.

EXAMPLE 4-1:

HOW TO CLEAR RAM

USING INDIRECT

ADDRESSING

MOVLW

0x10

;initialize pointer

MOVWF

FSR

;to RAM

CLRF

INDF

;clear INDF

;register

INCF

FSR,F

;inc pointer

BTFSC

FSR,4

;all done?

GOTO

;NO, clear next

CONTINUE

;YES, continue

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