RZSLASHT2L datasheet(35/103 Pages) RENESAS

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2.5.1.4

EXTAL/XTAL Clock Timing

Table 2.18

EXTAL/XTAL clock timing

Parameter

Symbol

Conditions

Min.

Typ.

Max.

Unit

EXTAL/XTAL clock frequency*1

fXTAL

—

25.00 ± 50 ppm

MHz

EtherCAT in use

25.00 ± 25 ppm

MHz

Note:

When using an external oscillator, be sure to leave XTAL open-circuit and make sure that EXTAL is driven low.

Note 1. When using the EXTAL/XTAL clock (i.e. crystal resonator), ask the oscillator manufacturer to evaluate oscillation of the oscillator.

For the oscillation stabilization time, see the evaluation result provided by the oscillator manufacturer.

XTAL clock oscillator output

1/2 × VDD

fXTAL

EXTAL clock oscillator input

VSS

VDD

The swing voltage range of EXTAL/XTAL should be from VSS to VDD.

Figure 2.5

EXTAL clock oscillator input and XTAL clock oscillator output timing

2.5.1.5

LOCO Clock Timing

Table 2.19

LOCO clock timing

Parameter

Symbol

Conditions

Min.

Typ.

Max.

Unit

LOCO clock cycle time

tLcyc

—

4.62

4.17

3.79

µs

LOCO clock oscillation frequency

tLOCO

—

216

240

264

kHz

LOCO clock oscillation stabilization wait time

tLOCOWT

—

µs

LOCOCR.LCSTP

Low-speed on-chip

oscillator output

LOCO clock

tLOCOWT

Figure 2.6

LOCO clock oscillation start timing

2.5.2

Reset, Interrupt, and Mode Timing

Table 2.20

Reset, interrupt, and mode timing (1 of 2)

Parameter

Symbol

Conditions

Min.

Typ.

Max.

Unit

RES# pulse width

At power on

tdlyreset

Figure 2.7

—

Other than above

tdlyreset2

—

RES# rising time

trisereset

—

150

µs

TRST# pulse width

At power on

tdlyreset

—

Other than above

tdlyreset2

—

TRST# rising time

trisereset

—

150

µs

RZ/T2L Datasheet

2. Electrical Characteristics

R01DS0409EJ0130 Rev.1.30

Feb 27, 2026

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