RZSLASHT2L datasheet(17/103 Pages) RENESAS

17 / 103 page

Table 1.17

Pin functions (6 of 7)

Classification

Pin name

I/O

Description

Serial peripheral interface

(SPI)

SPI_RSPCK0 to SPI_RSPCK3

I/O

Clock I/O pins

SPI_MOSI0 to SPI_MOSI3

I/O

Master transmit data I/O pins

SPI_MISO0 to SPI_MISO3

I/O

Slave transmit data I/O pins

SPI_SSL00 to SPI_SSL30

I/O

Slave select signal I/O pins

SPI_SSL01 to SPI_SSL31,

SPI_SSL02 to SPI_SSL32,

SPI_SSL03 to SPI_SSL33

Output

Slave select signal output pins

Expanded serial peripheral

interface (xSPI)

XSPI0_CKP, XSPI1_CKP,

XSPI0_CKN

Output

Clock output pins

XSPI0_CS0#, XSPI0_CS1#,

XSPI1_CS0#

Output

Chip select output pins

XSPI0_DS, XSPI1_DS

I/O

Read data strobe/write data mask input/output pin

XSPI0_IO0 to XSPI0_IO7,

XSPI1_IO0 to XSPI1_IO7

I/O

Data0 to Data7 input/output pins

XSPI0_RESET0#, XSPI0_RESET1#

Output

Master reset status output pins

XSPI0_RSTO0#, XSPI0_RSTO1#

Input

Slave reset status input pins

XSPI0_INT0#, XSPI0_INT1#

Input

Interrupt input pins

XSPI0_ECS0#, XSPI0_ECS1#

Input

Error correction status input pins

XSPI0_WP0#, XSPI0_WP1#

Output

Write protect output pins

ΔΣ interface (DSMIF)

MCLK0 to MCLK5

I/O

Clock I/O pins

MDAT0 to MDAT5

Input

Data input pins

12-bit A/D converter

(ADC12)

AN000 to AN003,

AN100 to AN103

Input

Analog input pins for the A/D converter

ADTRG0#, ADTRG1#

Input

External trigger input pins for the start of A/D

conversion

Analog power supply

VCC18_ADC0, VCC18_ADC1

Input

Analog power supply input pin for the 12-bit A/D

converter. Connect this pin to the 1.8 V power supply if

the 12-bit A/D converter is not to be used.

VREFH0, VREFH1

Input

Reference voltage input pin for the 12-bit A/D

converter. Connect this pin to the 1.8 V power supply if

the 12-bit A/D converter is not to be used.

I/O ports

P00_0 to P24_2

I/O

General-purpose input/output pins

Serial host interface

(SHOSTIF)

HSPI_CK

Input

Clock input pin

HSPI_CS#

Input

Chip select input pin

HSPI_IO0 to HSPI_IO7

I/O

Data0 to Data7 input/output pins

HSPI_INT#

Output

Interrupt output pin

Mailbox

MBX_HINT#

Output

Mailbox (Cortex-R52 to Host) interrupt output pin

Encoder I/F common

ENCIFCK0, ENCIFCK1

Output

Encoder I/F clock output pins

ENCIFOE0, ENCIFOE1

Output

Encoder I/F data output enable pins

ENCIFDO0, ENCIFDO1

Output

Encoder I/F data output pins

ENDIFDI0, ENDIFDI1

Input

Encoder I/F data input pins

EnDat 2.2 (ENDAT)

DUEI0, DUEI1

Output

EnDat 2.2 Data transfer

TST_OUT0, TST_OUT1

Output

EnDat 2.2 Data input after internal synchronization

SI0#, SI1#

Output

EnDat 2.2 Start pulse

RZ/T2L Datasheet

1. Overview

R01DS0409EJ0130 Rev.1.30

Feb 27, 2026

Page 17 of 103

RZ/T2L Datenblatt(PDF) 17 Page - Renesas Technology Corp

RZ/T2L Datenblatt(HTML) 17 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datenblatt Download

Link URL