WM8953ECSSLASHRV datasheet(40/100 Pages) WOLFSON

40 / 100 page

WM8953

Production Data

PD, January 2009, Rev 4.0

The polarity of each ADC output signal can be changed under software control using the

ADCL_DATINV and ADCR_DATINV register bits. The AIFADCL_SRC and AIFADCR_SRC register

bits may be used to select which ADC is used for the left and right digital audio interface data. These

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

AIFADCL_SRC

Left Digital Audio channel source

0 = Left ADC data is output on left channel

1 = Right ADC data is output on left channel

R4 (04h)

AIFADCR_SRC

Right Digital Audio channel source

0 = Left ADC data is output on right channel

1 = Right ADC data is output on right channel

ADCL_DATINV

Left ADC Invert

0 = Left ADC output not inverted

1 = Left ADC output inverted

R14 (0Eh)

ADCR_DATINV

Right ADC Invert

0 = Right ADC output not inverted

1 = Right ADC output inverted

Table 17 ADC Routing and Control

THERMAL SENSING

The WM8953 incorporates a thermal sensor in order to provide protection from overheating. The

sensor is enabled by setting TSHUT_ENA. The status of the thermal sensor can be output on a

GPIO pin and/or read from the GPIO registers. Alternatively, the temperature sensor can be

configured to cause an Interrupt event. See “General Purpose Input/Output” for further details.

Note that, if thermal shutdown is required, this must be implemented by the host processor, in

response to the thermal status indication generated by the WM8953.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R2 (02h)

TSHUT_ENA

(rw)

Thermal Sensor Enable

0 = Thermal sensor disabled

1 = Thermal sensor enabled

Table 18 Thermal Shutdown

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