WM8953ECSSLASHRV datasheet(22/100 Pages) WOLFSON

Teilenummer	WM8953ECS/RV

Bauteilbeschribung	Low Power Stereo ADC with PLL and TDM Interface

PDF	100 Pages

Scroll/Zoom	100%

Hersteller	WOLFSON [Wolfson Microelectronics plc]

Direct Link	http://www.wolfsonmicro.com

Logo

22 / 100 page

WM8953

Production Data

PD, January 2009, Rev 4.0

CONTROL INTERFACE TIMING – 4-WIRE MODE

4-wire mode supports readback via SDOUT which is available as a GPIO pin function.

Figure 9 Control Interface Timing – 4-Wire Serial Control Mode (Write Cycle)

CSB

SCLK

SDOUT

LSB

Figure 10 Control Interface Timing – 4-Wire Serial Control Mode (Read Cycle)

Test Conditions

DCVDD=1.8V, DBVDD=AVDD=3.3V, DGND=AGND=0V, TA =+25

oC, Slave Mode, fs=48kHz, MCLK=256fs, 24-bit data, unless

otherwise stated.

PARAMETER

SYMBOL

MIN

TYP

MAX

UNIT

Program Register Input Information

SCLK rising edge to CSB falling edge

tCSU

SCLK falling edge to CSB rising edge

tCHO

SCLK pulse cycle time

tSCY

200

SCLK pulse width low

tSCL

SCLK pulse width high

tSCH

SDIN to SCLK set-up time

tDSU

SDIN to SCLK hold time

tDHO

SDOUT propagation delay from SCLK rising edge

tDL

Pulse width of spikes that will be suppressed

tps

SCLK falling edge to SDOUT transition

tDL

WM8953ECS/RV Datenblatt(PDF) 22 Page - Wolfson Microelectronics plc

WM8953ECS/RV Datenblatt(HTML) 22 Page - Wolfson Microelectronics plc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100

Datenblatt Download

Link URL