Minimum Frequency (MHz)

Maximum Frequency (MHz)

Voltage

(V)

Interface

Soft Controller

Hard Controller

167

300

400

1.8

DDR2 SDRAM

167

300

333

1.2

LPDDR2 SDRAM

Related Information

External Memory Interface Spec Estimator

For the latest information and to estimate the external memory system performance specification, use Altera's

External Memory Interface Spec Estimator tool.

HPS External Memory Performance

Table 21: HPS External Memory Interface Performance

The hard processor system (HPS) is available in Cyclone V SoC devices only.

HPS Hard Controller (MHz)

Voltage (V)

Interface

400

1.5

DDR3 SDRAM

400

1.35

400

1.8

DDR2 SDRAM

333

1.2

LPDDR2 SDRAM

Related Information

External Memory Interface Spec Estimator

For the latest information and to estimate the external memory system performance specification, use Altera's

External Memory Interface Spec Estimator tool.

Low-Power Serial Transceivers

Cyclone V devices deliver the industry’s lowest power 6.144 Gbps transceivers at an estimated 88 mW

maximum power consumption per channel. Cyclone V transceivers are designed to be compliant with a

wide range of protocols and data rates.

Transceiver Channels

The transceivers are positioned on the left outer edge of the device. The transceiver channels consist of the

physical medium attachment (PMA), physical coding sublayer (PCS), and clock networks.

Cyclone V Device Overview

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HPS External Memory Performance

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2013.12.26