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ICS1531 Rev N 12/1/99

December, 1999

Chapter 6

ICS1531 Data Sheet - Preliminary

6.5.23

The MCLK-M Register is used to divide the reference frequency provided to the MCLK PLL. The ‘M’ value

is used to determine the output frequency of the PLL as specified in the equation given in Section 6.5.24,

“Register 27h: MCLK-N”.

6.5.24

The MCLK-N Register is used to determine the output frequency of the MCLK.

To determine the MCLK frequency (which is in units of MHz), use the following equation:

FMCLK =

Table 6-23.

MCLK-M Register

Bit

Bit Name

Bit Definition

Ac-

cess

Spec.

Func.

Re-

set

26:7-

26:0

MCLK_M [7-0]

MCLK M (Reference Divider) [7-0].

• This register includes bits for the MCLK Reference

Divider.

• The value in this register is used as the variable ‘M’ in the

frequency equation given in Section 6.5.24, “Register

27h: MCLK-N”.

R/W

D-MK

Table 6-24.

MCLK-N Register

Bit

Bit Name

Bit Definition

Ac-

cess

Spec.

Func.

Re-

set

27:7-

27:0

MCLK_N [7-0]

MCLK N (Feedback Divider) [7-0].

• This register includes bits for the MCLK Feedback

Divider.

• The value in this register is used as the variable ‘N’ in

the frequency equation for the MCLK.

R/W

D-MK

OSC

× (N + 8)

(M + 2)

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