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ICS1531 Datenblatt(PDF) 46 Page - Integrated Circuit Systems

Teilenummer ICS1531
Bauteilbeschribung  Triple 8-bit MSPS A/D Converters with Line-Locked Clock Generator
PDF  76 Pages
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Hersteller  ICST [Integrated Circuit Systems]
Direct Link  http://www.icst.com
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ICS1531 Datenblatt(HTML) 46 Page - Integrated Circuit Systems

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ICS1531 Rev N 12/1/99
December, 1999
46
Chapter 6
Register Set
ICS1531 Data Sheet - Preliminary
Copyright © 1999, Integrated Circuit Systems, Inc.
All rights reserved.
6.5.30
Register 2Dh: PLL Reset
The PLL Reset (Phase-Locked Loop Reset) Register is used to reset the MCLK and PNLCLK PLLs.
6.5.31
Register 2Eh-2Fh: Reserved
These registers are reserved. (See Section 6.1, “Reserved Bits”.)
Table 6-30.
PLL Reset Register
Bit
Bit Name
Bit Definition
Ac-
cess
Spec.
Func.
Re-
set
2D:7-
2D:4
MCLK_Reset [3-0]
MCLK Reset [3-0].
Writing 5xh to these bits:
• Resets MCLK PLL.
• Loads working Regs 26h to 2Bh.
Write
–
N/A
2D:3-
2D:0
PNLCLK_Reset [3-0]
PNLCLK Reset [3-0].
Writing xAh to these bits:
• Resets PNLCLK PLL.
• Loads working Regs 20h to 25h.
Write
–
N/A



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