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STM32U595AI Datenblatt(PDF) 276 Page - STMicroelectronics |
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STM32U595AI Datenblatt(HTML) 276 Page - STMicroelectronics |
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276 / 377 page ![]() Electrical characteristics STM32U59xxx 276/377 DS13633 Rev 1 Figure 38. Typical connection diagram when using the ADC with FT/TT pins featuring analog switch function 1. Refer to the ADCx characteristic table for the values of RAIN and CADC. 2. Cparasitic represents the capacitance of the PCB (dependent on soldering and PCB layout quality) plus the pad capacitance (refer to Table 84: I/O static characteristics for the value of the pad capacitance). A high Cparasitic value downgrades the conversion accuracy. To remedy this, fADC must be reduced. 3. Refer to Table 84: I/O static characteristics for the values of Ilkg. 4. Refer to Section 5.1.6: Power supply scheme. General PCB design guidelines The power-supply decoupling must be performed as shown in the corresponding power-supply scheme. The 100 nF capacitor must be ceramic (good quality) and must be placed as close as possible to the chip. 5.3.19 12-bit analog-to-digital converter (ADC4) characteristics Unless otherwise specified, the parameters given in the table below are values derived from tests performed under ambient temperature, fHCLK frequency and VDDA supply voltage conditions summarized in Table 32. Note: It is recommended to perform a calibration after each power-up. MSv67871V3 Sample-and-hold ADC converter Converter Cparasitic (2) Ilkg (3) CADC VDDA (4) RAIN (1) VAIN RADC VREF+ (4) VSSA I/O analog switch Sampling switch with multiplexing VSS VSS Table 97. 12-bit ADC4 characteristics(1)(2) Symbol Parameter Conditions Min Typ Max Unit VDDA Analog power supply for ADC ON -1.62 - 3.6 V VREF+ Positive reference voltage - 1 - VDDA VREF- Negative reference voltage - VSSA fADC ADC clock frequency 1.62 V ≤ VDDA ≤ 3.6 V 0.14 - 55 MHz ADC clock duty cycle - 45 - 55 % fs Sampling rate Resolution = 12 bits 0.01 - 2.75 Msps Resolution = 10 bits 0.012 - 3.05 Resolution = 8 bits 0.014 - 3.43 Resolution = 6bits 0.0175 - 3.92 |
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