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STM32U595AI Datenblatt(PDF) 296 Page - STMicroelectronics |
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STM32U595AI Datenblatt(HTML) 296 Page - STMicroelectronics |
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296 / 377 page ![]() Electrical characteristics STM32U59xxx 296/377 DS13633 Rev 1 Table 110. MDF characteristics(1) Symbol Parameter Conditions Min Typ Max Unit fCKI Input clock frequency via MDF_CKIx pin, in SLAVE SPI mode 1.71 ≤ VDD ≤ 3.6 V -- 25 MHz fCCKI Input clock frequency via MDF_CCK[1:0] pin, in SLAVE SPI mode -- 25 fCCKO Output clock frequency in MASTER SPI mode -- 25 fCCKOLF Output clock frequency in LF_MASTER SPI mode -- 5 fSYMB Input symbol rate in Manchester mode -- 20 tHCKI tLCKI MDF_CKIx input clock high and low time In SLAVE SPI mode 2 × Tmdf_proc_ck(2) -- ns tHCCKI tLCCKI MDF_CCK[1:0] input clock high and low time In SLAVE SPI mode 2 × Tmdf_proc_ck -- tHCCKO tLCCKO MDF_CCK[1:0] output clock high and low time In MASTER SPI mode 2 × Tmdf_proc_ck -- tHCCKOLF tLCCKOLF MDF_CCK[1:0] output clock high and low time In LF_MASTER SPI mode Tmdf_proc_ck - - tSUCKI Data setup time with respect to MDF_CKIx input In SLAVE SPI mode, measured on rising and falling edge 1.5 - - ns tHDCKI Data hold time with respect to MDF_CKIx input 0- - tSUCCKI Data setup time with respect to MDF_CCK[1:0] input In SLAVE SPI mode: MDF_CCK[1:0] configured in input, measured on rising and falling edge 1.5 - - tHDCCKI Data hold time with respect to MDF_CCK[1:0] input 0.5 - - tSUCCKO Data setup time with respect to MDF_CCK[1:0] output In MASTER SPI mode: MDF_CCK[1:0] configured in output, measured on rising and falling edge 3.5 - - tHDCCKO Data hold time with respect to MDF_CCK[1:0] output 1.5 - - tSUCCKOLF Data setup time with respect to MDF_CCK[1:0] output In LF_MASTER SPI mode, MDF_CCK[1:0] configured in output, measured on rising and falling edge 19.5 - - tHDCCKOLF Data hold time with respect to MDF_CCK[1:0] output 0- - 1. Evaluated by characterization. Not tested in production. 2. Tmdf_proc_ck is the period of the MDF processing clock. |
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