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STM32U595AI Datenblatt(PDF) 328 Page - STMicroelectronics

Teilenummer STM32U595AI
Bauteilbeschribung  Ultra-low-power Arm® Cortex®-M33 32-bit MCUTrustZone®FPU,240 DMIPS, up to 4 MB Flash, 2.5 MB SRAM, LTDC, MIPI® DSI
PDF  377 Pages
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Hersteller  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32U595AI Datenblatt(HTML) 328 Page - STMicroelectronics

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Electrical characteristics
STM32U59xxx
328/377
DS13633 Rev 1
Figure 70. OCTOSPI HyperBus read
Figure 71. OCTOSPI HyperBus read with double latency
Figure 72. OCTOSPI HyperBus write
MSv47733V3
NCS
tACC= Initial access
Latency count
Command address
47:40 39:32
31:24
23:16
15:8
7:0
Dn
A
Dn
B
Dn+1
A
Dn+1
B
Host drives DQ[7:0] and the memory drives RWDS.
CLK, NCLK
RWDS
DQ[7:0]
Memory drives DQ[7:0] and RWDS.
tw(CS)
tv(RWDS)
tv(CLK)
tv(DS)
tv(DQ)
th(CLK)
th(DS)
tv(OUT)
th(OUT)
th(DQ)
ts(DQ)
MSv49351V3
NCS
t
RWR=Read/write recovery
tACC = Access
Additional latency
Command address
47:40 39:32 31:24 23:16 15:8
7:0
High = 2x latency count
Low = 1x latency count
Dn
A
Dn
B
Dn+1
A
Dn+1
B
Host drives DQ[7:0] and the memory drives RWDS.
RWDS and data
are edge aligned
CLK, NCLK
RWDS
DQ[7:0]
Memory drives DQ[7:0] and RWDS.
tCKDS
MSv47734V3
NCS
Access latency
Latency count
Command address
47:40
39:32
31:24
23:16
15:8
7:0
Dn
A
Dn
B
Dn+1
A
Dn+1
B
Host drives DQ[7:0] and the memory drives RWDS.
Host drives DQ[7:0] and RWDS.
CLK, NCLK
RWDS
DQ[7:0]
tw(CS)
tv(RWDS)
tv(CLK)
th(CLK)
High = 2x latency count
Low = 1x latency count
Read write recovery
th(OUT)
tv(OUT)
th(OUT)
tv(OUT)
th(OUT)
tv(OUT)



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