 |
Datenblatt-Suchmaschine für elektronische Bauteile |
|
|
Datenblatt-Suchmaschine für elektronische Bauteile |
|
AS8515 Datenblatt(PDF) 23 Page - ams AG |
|
|
|||||||||||||||||||||||||||||
AS8515 Datenblatt(HTML) 23 Page - ams AG |
|
|
23 / 65 page  www.ams.com Revision 0.7 23 - 65 AS8515 Datasheet - AS8515 To p Die Overview 7.16.5 Window Watchdog Timer 7.16.6 LIN Transceiver DC Electrical Characteristics. Table 22. WWD Symbol Parameter Condition Min Typ Max Unit WD_TCL Factory setting 1 WWD non-service time RESET will be generated 0-100 ms WD_TSV WWD Service time RESET will not be generated 100-200 ms WD_TCL1 Factory setting 2 WWD non-service time RESET will be generated 0-80 ms WD_TSV1 WWD Service time RESET will not be generated 80-160 ms WD_TCL2 Factory setting 3 WWD non-service time RESET will be generated 0-60 ms WD_TSV2 WWD Service time RESET will not be generated 60-120 ms WD_TCL3 Factory setting 4 WWD non-service time RESET will be generated 0-200 ms WD_TSV3 WWD Service time RESET will not be generated 200-400 ms WD_TCL4 Factory setting 5 WWD non-service time RESET will be generated 0-160 ms WD_TSV4 WWD Service time RESET will not be generated 160-320 ms WD_TCL5 Factory setting 6 WWD non-service time RESET will be generated 0-120 ms WD_TSV5 WWD Service time RESET will not be generated 120-240 ms Table 23. Driver Symbol Parameter Condition Min Typ Max Unit Ibus_lim Current limitation in dominant state LIN = VSUP_max 40 120 200 mA LIN_VOL Output Voltage BUS (dominant state), ILIN = 40mA (short-circuit condition tested at VOL=2.5V) 2V Pull-up resistor Normal mode (recessive BUS level on Tx pin) 20 40 60 K Ω Ibus_leak_rec Driver OFF; 7.3V < VSUP < 18; 8V < VBAT < 18, VSUP < VBUS < 1.08 * VSUP (to be tested at VBUS = 18V) 20 µA Table 24. Receiver Symbol Parameter Condition Min Typ Max Unit Ibus_leak_dom Input Leakage current at receiver Driver OFF; VBUS = 0V; VSUP = 12V; VCC = 3.3V -1 mA Ibus_no_GND VSS = VSUP; VSUP = 12V; 0V < VBUS < 18V, VCC = 3.3V (to be tested at VBUS = 18V) -1 1 mA Ibus_no_bat VSUP = VSS; 0V < VBUS < 18V, VCC = VSS (to be tested at VBUS = 18V) 100 µA Vbus_dom 0.4 VSUP Vbus_rec 0.6 VSUP Vbus_cnt Vbus_cnt = (Vth_dom + Vth_rec)/2 1 1. Vth_dom : Receiver threshold of the recessive to dominant LIN bus edge Vth_rec : Receiver threshold of the dominant to recessive LIN bus edge 0.475 0.525 VSUP Vhys Vhys = (Vth_dom – Vth_rec) 1 0.05 0.175 VSUP |
|
Link URL |
| War ALLDATASHEET hilfreich? [ DONATE ] |
Über Alldatasheet | Werbung | Kontakt | Privatsphäre und Datenschutz | Link zum Datenblatt | Linktausch | Hersteller All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
German ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
