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AS8515 Datenblatt(PDF) 33 Page - ams AG

Teilenummer AS8515
Bauteilbeschribung  Data Acquisition System with Power Management and LIN Transceiver for 12V Battery Sensor Applications
PDF  65 Pages
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Hersteller  AMSCO [ams AG]
Direct Link  http://www.ams.com
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AS8515 Datenblatt(HTML) 33 Page - ams AG

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AS8515
Datasheet - AS8515 Bottom Die Overvi ew
8.7.4 Standby Mode2 (SBM2)
Standby Mode 2 is an extension of the Standby Mode1 to achieve even a lower power in the data acquisition system by providing interrupt to the
microcontroller only when the data sample exceeds the set current threshold. The Standby Mode can be entered only through the STOP state.
Transition to SBM2 mode occurs when the “START BIT” D0 of Mode Control register MOD_CTL_REG in Table 49 is set to “1” and Mode Control
Bits D7,D6 to “1,1” through SPI. In this mode the date rate is programmable with the time of Ta in the Ta control registers B, C. The data sample
is made available and an interrupt signal is generated on INT pin only when the input signal exceeds the threshold set in Current Threshold
Registers D,E. It should be noted here that the data is stable for Ta seconds. The functionality is illustrated in Figure 22.
Figure 22. Standby Mode 2
8.8 Initialization Sequence at Power ON
Figure 23. Bottom Die Device Initialization Sequence at Power ON
Device initialization starts if the DVDD and AVDD supplies are switched ON and DVDD > VPORHID. The duration period of Initialization is 500
μsec
and during this period, INT pin toggles at the rate of internal low power oscillator. Toggling on INT during the period of initialization should be
ignored in the system. Device configuration and activation should be carried out only after the initialization period.
On ADC start, device enters into analog stabilization state and takes 1.5msec for oscillator and Reference to settle. After this 1.5msec period, the
first interrupt will occur after a time period of TADC.
ADC
t
Tconv
Start SBM2
Ta sec.
Ta sec.
Ta sec.
IDD
I
Tconv
Tconv
I
MCU
|I| > I Threshold
INT
Channel
DATA Register
DATA – A1
DATA – A0
DATA – A2
DATA – A3
TINT
Configure
Device
Start
ADC
DVDD/AVDD
POR_N
INT
CHOP_CLK
Channel Data
Register
0x0000
DATA1
DATA2
D1
D2
D3
D4
D1
D2
D3
D4
D1
D2
D3
D4
500µS
1.5mS
TDATA_STATUS_RD
TDATA_VALID
TDATA_INVALID
VPORHID/VPORHIA
TADC



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