MPC5644BCAMMJ1 datasheet(42/116 Pages) NXP

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MPC5646C Microcontroller DataSheet, Rev. 7

Electrical Characteristics

NXP Semiconductors

2 100 nF EMI capacitance needs to be provided between each VDD_LV/VSS_LV supply pair. 10 µF bulk capacitance

needs to be provided as CREG on each VDD_LV pin. For details refer to the Power Management chapter of the

MPC5646C Reference Manual.

3 This voltage is internally generated by the device and no external voltage should be supplied.

4 100 nF capacitance needs to be provided between V

DD_ADC/VSS_ADC pair.

5 Full electrical specification cannot be guaranteed when voltage drops below 3.0 V. In particular, ADC electrical

characteristics and I/Os DC electrical specification may not be guaranteed. When voltage drops below VLVDHVL, device

is reset.

6 Both the relative and the fixed conditions must be met. For instance: If V

DD_HV_A is 5.9 V, VDD_HV_ADC0 maximum value

is 6.0 V then, despite the relative condition, the max value is VDD_HV_A +0.3 =6.2 V.

7 PA3, PA7, PA10, PA11 and PE12 ADC_1 channels are coming from V

DD_HV_B domain hence VDD_HV_ADC1 should be

within ±100 mV of VDD_HV_B when these channels are used for ADC_1.

8 Guaranteed by the device validation.

Table 10. Recommended operating conditions (5.0 V)

Symbol

Parameter

Conditions

Value

Unit

Min

Max

VSS_HV

SR Digital ground on VSS_HV pins

—

VDD_HV_A

SR Voltage on VDD_HV_A pins with

respect to ground (VSS_HV)

—4.5

5.5

Voltage drop2

3.0

5.5

VDD_HV_B

SR Generic GPIO functionality

—

3.0

5.5

Ethernet/3.3 V functionality

(See the notes in all figures in

Section 3, “Package pinouts and

signal descriptions” for the list of

channels operating in VDD_HV_B

domain)

—3.0

3.6

VSS_LV

SR Voltage on VSS_LV (Low voltage

digital supply) pins with respect to

ground (VSS_HV)

—VSS_HV –0.1

VSS_HV +0.1

VRC_CTRL

Base control voltage for external

BCP68 NPN device

Relative to

VDD_LV

0VDD_LV +1

VSS_ADC

SR Voltage on VSS_HV_ADC0,

VSS_HV_ADC1 (ADC reference)

pin with respect to ground

(VSS_HV)

—VSS_HV –0.1

VSS_HV +0.1

VDD_HV_ADC0

5 SR Voltage on VDD_HV_ADC0 with

respect to ground (VSS_HV)

—4.5

5.5

Voltage drop(2)

3.0

5.5

Relative to

VDD_HV_A

VDD_HV_A –0.1

VDD_HV_A +0.1

VDD_HV_ADC1

7 SR Voltage on VDD_HV_ADC1 with

respect to ground (VSS_HV)

—4.5

5.5

Voltage drop(2)

3.0

5.5

Relative to

VDD_HV_A

VDD_HV_A − 0.1

VDD_HV_A +0.1

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